|HSPICE Tips & Tricks Webisode Series|
Learn from Synopsys applications engineers how to get the most out of HSPICE analysis. Topics will include how to most effectively use S-element, eye diagrams, IBIS-AMI, RUNLVL, and more. New mini webinars will premiere monthly.
Ted Mido, Principal Engineer, HSPICE R&D, Synopsys
Nov 03, 2014
|FineSim Technology for Analog and Full-Chip Simulation - A Micron Case Study|
Learn about FineSim’s transient analysis advantage and the rich feature set that that combines SPICE and FastSPICE simulation technology in one single environment used for memory design at Micron.
Raed Sabbah, Sr. Design Engineer, Embedded Solutions Group, Micron Technology
May 08, 2014
|Eliminate DDR3 Timing Errors with HSPICE and Zuken Constraint-based PCB Routing|
Learn how to analyze signal integrity of critical traces in your PC board layout, incorporate board parasitics and define design constraints to eliminate timing violations.
Griff Derryberry, Applications Engineer, Zuken USA; Hany Elhak, Product Marketing Manager, Synopsys
Dec 11, 2013
|Power Management ICs – Efficient Design: A Richtek and Synopsys Perspective|
Richtek and Synopsys present the key challenges and trends with latest power management Integrated Circuits and discuss recent EDA tool innovations to shorten development time and maximize QoR.
K C Chang, Vice President, Technology Development, Richtek Technology Company; Andy Biddle, Solution Marketing Manager, Synopsys
Oct 03, 2013
|Advanced-node Custom Layout Using the Laker Custom IC Solution|
Learn about Laker’s rule-based layout, schematic-driven layout, and pattern-based multi-device layout features--ideal solutions for those seeking to improve custom layout productivity at 20-nm and below.
Neel Gopalin, Corporate Applications Engineer, Synopsys; Christopher Shaw, Senior Staff Technical Marketing Manager, Synopsys
May 30, 2013
|Accelerate Time-to-Tapeout with IC Compiler Custom Co-Design|
Learn how using IC Compiler and Galaxy Custom Designer accelerates the SoC design cycle by enabling quick and reliable custom edits to IC Compiler designs at any stage of development.
Christopher Shaw, Senior Staff Technical Marketing Manager, Synopsys; Randy Bishop, Principal Engineer, Synopsys
Oct 24, 2012
|High-Productivity Analog Verification and Debug with CustomSim and CustomExplorer Ultra|
See how Synopsys' advanced analog verification solution can dramatically increase your verification productivity with CustomExplorer Ultra, along with CustomSim and CustomSim-VCS.
Duncan McDonald, Product Marketing Manager, Synopsys
Jul 11, 2012