Low Power
Addressing Low Power Verification Challenges with Advanced Static Checking and Native Low Power Simulation (Part 1 of 4)
In this session, we will discuss UPF based static and dynamic verification techniques to address these challenges. We will also discuss the problems addressed by Synopsys’ VC LP and VCS NLP tools, to streamline the entire verification process.
Kiran Vittal, Product Marketing Director, Verification Group; Amol Herlekar, Sr. Staff Engineer, Verification Group, Ankush Bagotra, Staff Engineer, Verification Group, Synopsys, Inc.
Aug 10, 2016

Evolution of Socionext’s Golden UPF Design Flow for Achieving Power Efficiency
Learn about Socionext’s ever-evolving UPF design flow and their experience with successfully deploying a Golden UPF-based methodology using Synopsys tools.
Mahiro Hikita, Manager, Design Department II, SoC Design Division, Socionext, Inc.
Apr 07, 2016

Evolution of Socionext’s Golden UPF Design Flow for Achieving Power Efficiency (Japanese)
Learn about Socionext’s ever-evolving UPF design flow and their experience with successfully deploying a Golden UPF-based methodology using Synopsys tools.
Mahiro Hikita, Manager, Design Department II, SoC Design Division, Socionext, Inc.
Apr 07, 2016

Synopsys and TSMC Get Smart with Bluetooth for IoT SoCs
Learn about the growing IoT market trends, the required wireless connectivity and new process technologies to achieve low-power consumption and enable efficient connectivity between devices.
Manuel Mota, Technical Marketing Manager, Synopsys; Leon Chang, Program Manager, TSMC
Feb 03, 2016

Securing Your IoT Processor Based System
This webinar will provide insight into IoT edge device security requirements and how they can be met with an ultra-low power processor.
Angela Raucher, Product Line Manager, ARC EM Processors, Synopsys
Dec 03, 2015

Impact of IP Reliability, Functional Safety & Quality in Automotive ADAS SoCs
Learn about ISO 26262 and AEC Q100 standards; latency, power, reliability and process-related design challenges; and how certified IP helps ensure functional safety, reliability and quality management.
Ron DiGiuseppe, Senior Strategic Marketing Manager, Synopsys
Dec 02, 2015

Using Foundation IP in Low-Power 40nm IoT Designs (Mandarin)
This webinar will provide details on how foundation IP - logic libraries and embedded memories - can help designers of IoT applications take advantage of the power benefits available in 40nm processes.
Xueheng Ren, Senior Field Application Engineer, Synopsys
Oct 20, 2015

Identifying and Resolving Low Power Issues Before Tapeout
This webinar highlights how to find low power issues during verification using Formality.
Bob Hatt, Staff Corporate Applications Engineer, Synopsys
Sep 29, 2015

Using Foundation IP in Low-Power 40nm IoT Designs
This webinar will provide details on how foundation IP - logic libraries and embedded memories - can help designers of IoT applications take advantage of the power benefits available in 40nm processes.
Kenneth Brock, Product Marketing Manager, Logic Libraries, Synopsys
Jul 21, 2015

An Approach for Efficient IP Reuse in a Hierarchical UPF Methodology
This webinar will help you understand a Liberty-based approach for effective IP reuse in implementation of a multi-voltage hierarchical design using the IEEE 1801 (UPF) standard.
Viswanath K. Ramanathan, Corporate Applications Engineer, Synopsys; Mary Ann White, Director of Product Marketing, Synopsys
Feb 26, 2015

Achieving Energy Efficiency for IoT Designs
Learn how new investments in IP help improve system power usage and energy efficiency and enable added functionality for IoT applications including wearable and machine-to-machine devices.
Ron Lowman, Strategic Marketing Manager for IoT, Synopsys
Jan 27, 2015

LPDDR4 Multi-Channel Architecture
Learn about connecting multiple channels of DRAM, tradeoffs in SoC floorplans, logical to physical addressing, connecting to on-chip buses, and low-power design methods for LPDDR4.
Marc Greenberg, Director of Product Marketing for DDR Controller IP, Synopsys
Dec 02, 2014

High-Speed Embedded Linux Processing on an Embedded Power Budget
This webinar will look at a new high-speed processor implementation that can bring high-performance to your Linux-based embedded designs while significantly reducing power consumption.
Mike Thompson, Sr. Product Marketing Manager, Synopsys
Nov 06, 2014

How to Develop Ultra-Low Power Voice Control and Sensor Devices for Always-On IoT Apps
Learn how the efficient response and low power consumption of the ARC® EM DSP processor and Sensory TrulyHandsfree™ software solution deliver excellent performance with long battery life for IoT apps.
Paul Garden, Product Marketing Manager, Synopsys; Bernard Brafman, Vice President of Business Development, Sensory
Sep 18, 2014



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