Taiwan 

Office Location 
Taiwan

Synopsys Taiwan Co., Ltd. (Hsinchu)
No.25, Industry East Road IV,
Science-Based Industrial Park,
Hsinchu 300, Taiwan
Tel: +886-3-579-4567
Fax: +886-3-579-9000
Email: tw_feedback@synopsys.com

Synopsys Taipei
Room 3108, 31F,
333 Keelung Road, Section 1
Taipei 110, Taiwan
Tel: +886-2-2345-3020
Fax: +886-2-2757-6009
Email: tw_feedback@synopsys.com


Workshop Schedule 2016

Date LocationWorkshopCost
Nov 24-25HsinchuStar-RCNTD 10,000
Dec 07-09HsinchuSystemVerilog TestbenchNTD 15,000
Dec 15-16HsinchuHspice EssentialsNTD 10,000

Workshop Schedule 2017

Date LocationWorkshopCost
Jan 11TaipeiCustomSim (XA)NTD 5,000
Jan 11-13HsinchuDesign CompilerNTD 15,000
Jan 12-13TaipeiPrimeRailNTD 10,000
Jan 17-18HsinchuSiliconSmartNTD 10,000
Jan 18-20TaipeiIC Compiler Block-Level ImplementationNTD 15,000
Jan 19-20HsinchuFormality (Functional Equivalence Checking)NTD 10,000
Feb 08-10HsinchuUVM 1.2NTD 15,000
Feb 09-10TaipeiStar-RCNTD 10,000
Feb 15-17HsinchuIC Compiler II: Block-level ImplementationNTD 15,000
Feb 22-24HsinchuPrimeTimeNTD 15,000
Mar 09-10HsinchuFineSimNTD 10,000
Mar 15-17HsinchuDFT CompilerNTD 15,000
Mar 22HsinchuSystemVerilog AssertionsNTD 5,000
Mar 23-24HsinchuIC Compiler II: SoC Design PlanningNTD 10,000
Apr 11-12HsinchuStar-RCNTD 10,000
Apr 12-14TaipeiSystemVerilog TestbenchNTD 15,000
Apr 13-14HsinchuPrimeRailNTD 10,000
Apr 19-21HsinchuTetraMAXNTD 15,000
Apr 26-28TaipeiIC Compiler II: Block-level ImplementationNTD 15,000
May 10-12TaipeiDesign CompilerNTD 15,000
May 16HsinchuPower-Aware Verification with VCS-NLP and UPFNTD 5,000
May 17HsinchuDesign Compiler 2 : Low PowerNTD 5,000
May 18-19TaipeiFormality (Functional Equivalence Checking)NTD 10,000
May 23-25HsinchuIC Compiler Block-Level ImplementationNTD 15,000
May 24-25TaipeiHspice EssentialsNTD 10,000
Jun 07-09TaipeiUVM 1.2NTD 15,000
Jun 14-15TaipeiStar-RCNTD 10,000
Jun 16TaipeiCustomSim (XA)NTD 5,000
Jun 21-23HsinchuPrimeTimeNTD 15,000
Jun 28-30HsinchuIC Compiler II: Block-level ImplementationNTD 15,000
Jul 20-21TaipeiSiliconSmartNTD 10,000
Jul 26-28HsinchuSystemVerilog TestbenchNTD 15,000
Aug 09-11TaipeiIC Compiler Block-Level ImplementationNTD 15,000
Aug 16-18HsinchuDFT CompilerNTD 15,000
Aug 22-23HsinchuStar-RCNTD 10,000
Aug 24-25HsinchuPrimeRailNTD 10,000
Sep 06-08HsinchuTetraMAXNTD 15,000
Sep13-15HsinchuDesign CompilerNTD 15,000
Sep 14-15TaipeiFineSimNTD 10,000
Sep 20-22HsinchuUVM 1.2NTD 15,000
Sep 26-27HsinchuFormality (Functional Equivalence Checking)NTD 10,000
Oct 18-20TaipeiPrimeTimeNTD 15,000
Oct 18-20HsinchuIC Compiler Block-Level ImplementationNTD 15,000
Oct 26-27HsinchuHspice EssentialsNTD 10,000

** Synopsys reserves the right to cancel or re-schedule the workshops **

Daily Class Time: 9:30am - 5:00pm
Download Training Schedule (PDF)

Registration

Registration Form(PDF)
Please fax registration forms to the following number.
Fax: (03)579 9000
Tel: (03)579 4567 ext. 30303 Ms. Chen



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