DesignWare IP Videos 


Featured MIPI Video: Synopsys Demonstrates DesignWare UFS Host and MIPI UniPro IP Interoperability

Synopsys plays a key role in supporting the mobile ecosystem by delivering high-quality, interoperable MIPI IP solutions that enable designers to deploy new features into their next-generation mobile devices, as demonstrated at Mobile World Congress 2014. This demonstration showcases the DesignWare® UFS Host and MIPI UniPro IP solutions' proven system-level interoperability.
Hezi Saar, Product Marketing Manager for MIPI IP, Synopsys and Philippe Borges, Field Applications Engineer, Synopsys

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Synopsys Launches DesignWare ARC Software Development Platforms

Learn how Synopsys’ new DesignWare® ARC® Software Development Platforms help designers accelerate software development for their ARC processor-based designs. These ready-to-use, integrated hardware and software platforms provide software developers an out-of-the-box solution that incorporates the hardware and software needed to significantly accelerate the code development, including silicon-proven ARC processors, peripheral I/O, operating systems and drivers, all on a single, integrated platform.
Allen Watson, Product Marketing Manager, ARC Tools, Synopsys

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Featured Ethernet Video: Reducing EMI in SerDes PHYs using Spread Spectrum Clocking

Learn what spread spectrum clocking (SSC) is and why it is important to high-speed SerDes design.
John Stonick, Synopsys Fellow, Solutions Group, Synopsys and Rita Horner, Sr. Technical Marketing Manager, Mixed Signal IP, Synopsys

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Featured PCIe Video: Understanding SRIS in PCIe Systems

SRIS is the latest clock architecture introduced by PCI-SIG. Understand what it is, why it was introduced, and how it compares to USB and SATA use models.
John Stonick, Synopsys Fellow, Solutions Group, Synopsys and Rita Horner, Sr. Technical Marketing Manager, Mixed Signal IP, Synopsys

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Featured USB Video: Synopsys Demonstrates First USB 3.1 IP at 10G Speeds with Ellisys Protocol Analyzer

View the world’s first platform-to-platform 10G USB 3.1 IP demonstration at speeds over 900 MBps as measured by the Ellisys USB Explorer Protocol Analyzer. The new Enhanced SuperSpeed USB 3.1 specification more than doubles the data throughput of USB 3.0, and Synopsys is the first IP provider to show Host-Device data transfers at USB 3.1 speeds across multiple platforms.
Chuck Trefts, VP, Operations, Ellisys and Eric Huang, Sr. Product Marketing Manager USB Digital IP, Synopsys

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Synopsys’ New DesignWare ARC HS Processors for Next-Generation Embedded Systems

Learn about Synopsys’ new DesignWare® ARC® HS processors, a new family of 32-bit high-speed, low-power processors optimized for power efficiency (DMIPS/mW) and area efficiency (DMIPS/mm²).
Mike Thompson, Sr. Product Marketing Manager, ARC Processors, Synopsys

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Introducing the DesignWare STAR Hierarchical System

The STAR Hierarchical System is a new automated hierarchical test solution that reduces test integration time and improves test QoR for SoCs.
Yervant Zorian, Fellow and Sr. Architect, Solutions Group, Synopsys

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Introducing the DesignWare Sensor IP Subsystem

Learn more about the complete DesignWare® Sensor IP Subsystem, an integrated, pre-verified hardware and software solution targeted for a broad range of sensor control applications such as smart sensors, sensor fusion, and sensor hub.
Rich Collins, Product Marketing Manager, Synopsys

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Designing IP for FinFET Technology: The Opportunities and Challenges

FinFETs are emerging as the device technology of choice at advanced nodes. This introduces new design challenges for IP development, which require knowledge of and experience in designing with FinFETs to ensure design success. This video describes the benefits and challenges of transitioning from planar to FinFET technologies and how IP plays a significant role in this transition.
Jamil Kawa, R&D Director, Synopsys



Featured DDR Video: Synopsys Discusses its New DDR4 Memory Interface IP

Sean O'Kane from ChipEstimate.com interviews Navraj Nandra about the Synopsys' DesignWare DDR4 IP product release. They discuss DDR4 SDRAM, its market, and their predictions for DRAM.
Navraj Nandra, Synopsys and Sean OKane, ChipEstimate.com

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Featured HDMI Video: Synopsys Demonstrates DesignWare® HDMI Receiver IP Solution with Fast Switching

See how Fast Switching technology reduces HDMI switching time from 5 seconds to 1 second. Using a BluRay player and a multimedia player, this video demonstrates the DesignWare HDMI Receiver IP solution's high-performance interoperability.
Antonio Costa, R&D Manager for the DesignWare HDMI Controller IP solutions, Synopsys

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Featured SATA Video: SATA Host IP Demo Using a Port Multiplier and FIS-Based Switching

See how DesignWare SATA host controller IP issues read/write commands to Port Multiplier-attached drives, while FIS-based switching interleaves the data packets to enhance the utilization of the 6 Gbps SATA link bandwidth
Mat Loikkanen, SATA R&D, Synopsys

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Featured Analog Video: Synopsys Demonstrates Next Generation DesignWare Data Converter IP solution

Synopsys shows the next generation DesignWare ADC IP 12-bit 250 MSPS, delivering outstanding performance, robustness and ultra low power dissipation of up to 50% less than previous generations.
Manuel Mota, Technical Marketing Manager, Synopsys and José Carmo, Application Engineer, Synopsys

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Synopsys Demonstrates DesignWare STAR Silicon Browser IP for Embedded Memory Test and Repair

This demonstration will feature the post-silicon interactive automation capabilities of the DesignWare STAR Silicon Browser, which utilizes the DesignWare STAR Memory System's embedded test & repair IP solution.
Yervant Zorian, Chief Architect, Synopsys, Gevorg Torjyan, R&D Engineer, Synopsys



Industry’s First Complete Audio IP Subsystem

Learn how the pre-integrated, configurable DesignWare® SoundWave Audio Subsystem helps you achieve great audio with a complete, SoC-ready subsystem solution. Also, join us in the Synopsys Sound Room, where we test our high-definition audio solutions, to see the SoundWave Audio Subsystem in action using a HAPS® FPGA-Based Prototyping System.
Henk Hamoen, Sr. Product Marketing Manager, Synopsys




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