DesignWare IP White Papers 

Safety in SoCs: Accelerating the Road to ISO 26262 Certification for the ARC EM Processor
Today’s system-on-chip (SoC) designs are becoming more complex, increasing the pressure on verification and design teams to deliver fully functional designs. Recent studies have shown that over 50% of the development time on a complex IC is now being spent on verification, revealing the severity of the problem project teams are facing. As more SoC designs are used in electronic systems deployed in safety-critical applications, adhering to functional safety standards such as ISO 26262 has become an important consideration when defining the verification methodology. This white paper outlines the key requirements for ISO 26262 certification and demonstrates how to accelerate the development of safety-critical IP and SoCs through the use of out-of-the-box safety-ready IP with advanced verification qualification tools and methodologies.
Steven Parkinson, R&D Engineer, Synopsys

Design, Test & Repair Methodology for FinFET-Based Memories
The advent of FinFET-based memories presents new memory test challenges. This white paper covers the new design complexities, defect coverage and yield challenges presented by FinFET-based memories; how to synthesize test algorithms for detection and diagnosis of FinFET specific memory defects; and how incorporating built-in self-test (BIST) infrastructures with high-efficiency test and repair capabilities can help to ensure high yield for FinFET-based memories.
Dr. Yervant Zorian, Chief Architect and Fellow, Synopsys

Anatomy of the HDMI IP Certification Flow
HDMI IP plays a critical role in enabling HDMI 2.0 features, making 60 frames per second UHD video and audio possible in multimedia SoCs. SoC designers can avoid costly functionality and interoperability issues by selecting and integrating HDMI IP that has gone through an extensive multi-phase testing process and achieved certification. This white paper outlines the HDMI IP certification flow from internal quality, functionality and interoperability testing to certification of the latest HDMI Compliance Test Specification (CTS) at an Authorized Test Center (ATC).
Dr. Antonio J. Salazar E., ASIC Digital Design Engineer, Synopsys; Hugo Faria, Embedded Software and Protocol Validation Engineer, Synopsys; Quintin D. Anderson, Co-Founder and COO, Granite River Labs

Using an Embedded Vision Processor to Build an Efficient Object Recognition System
The advent of high-performance mobile computing platforms is driving rapid progress in computer vision capabilities. Machine vision is becoming embedded in highly integrated SoCs and expanding into emerging high-volume consumer applications such as home surveillance, games, and automotive safety. A major challenge in enabling mass adoption of embedded vision applications is providing the processing capability at a power and cost point low enough for mobile consumer applications, while maintaining sufficient flexibility to cater to rapidly evolving markets. Read this whitepaper to understand the challenges of efficiently implementing an embedded vision system, explore an object detection application example and learn about the DesignWare Embedded Vision Processor Family.
James Campbell, CAE, Synopsys; Valeriy Kazantsev, CAE, Synopsys

Virtualizing Cloud Computing With Optimized IP for NFV SoCs
The growth in internet traffic is impacting how cloud and carrier data center operators design their compute and data networking architectures. To meet the application demands for scale-out servers and networks, designers are implementing virtual environments such as Network Function Virtualization (NFV) to achieve higher efficiency and lower the cost and time of deploying the new applications. This paper discusses how using the right IP accelerates the implementation of SoCs used in NFV systems.
Ron DiGiuseppe, Senior Strategic Marketing Manager, Synopsys



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