Synopsys offers a comprehensive portfolio of IP, tools and software to accelerate the deployment of highly-efficient embedded processors and DSPs into SoCs for a variety of applications
including mobile, IoT, digital home, automotive, industrial and storage.
The DesignWare® ARC® Processor IP portfolio consists of proven ARC 32-bit processor cores, embedded vision processors, audio processors and codecs, operating systems and development tools. ARC 32-bit processors are highly configurable so they can be tailored to meet the performance, power and area requirements of each target application. The extensible instruction set gives designers the ability to define their own custom instructions that dramatically improve application-specific performance, while reducing power consumption and memory requirements. All ARC Processor IP is supported by a complete and integrated development tool suite, including tools for configuration, design, simulation and software development. ARC processors are also supported by a variety of 3rd-party tools, operating systems and middleware from leading industry vendors enrolled in the ARC Access Program, as well as a comprehensive suite of free and open source software available through the embARC Open Software Platform.
In addition, Synopsys offers the DesignWare EV processors, which are specifically optimized to meet the demanding power and performance requirements of embedded vision applications. The EV processors are supported by a comprehensive software programming environment based on common embedded vision standards including OpenVX™ and OpenCL™ C, as well as Synopsys’ MetaWare Development Toolkit.
ARC processors are key components of DesignWare IP Subsystems, pre-verified and configurable hardware and software IP solutions that offer SoC-ready functionality to ease integration into SoCs.
Synopsys also offers ASIP Designer for automating the design and implementation of application-specific instruction-set processors (ASIPs). ASIP Designer enables designers to create custom processors and programmable hardware accelerators for specialized processing requirements.