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Apr 14, 2014TSMC Certifies Synopsys Digital and Custom Solution for V1.0 N16 Process
Certification Enables Designers to Realize the Power, Performance and Area Benefits of FinFET Technology

Oct 14, 2013TSMC Awards Synopsys "Partner of the Year 2013" for Joint Development of 16-nm FinFET Design Infrastructure
Synopsys Recognized for Valuable Contributions Towards Development of FinFET Technology

Oct 14, 2013Synopsys and TSMC Collaborate to Deliver 16-nm Custom Design Reference Flow
TSMC Includes Analog/Mixed-Signal Products for 16-nm Design Requirements

Sep 23, 2013Synopsys Implementation Solution in TSMC 16-nm Reference Flow for FinFET Design
Silicon-proven, project-ready implementation solution, together with TSMC’s 16-nm FinFET reference flow, gives early adopters the potential to develop faster, more power-efficient designs.

Jun 26, 2013Synopsys and UMC Collaborate to Accelerate Development of UMC’s 14-nm FinFET Process
Process Qualification Vehicle Tapeout Validates UMC 14-nm FinFET Process Using Synopsys DesignWare IP and StarRC Parasitic Extraction Tool

Jun 03, 2013Synopsys Delivers Comprehensive Design Implementation Solution for Samsung's Leading-Edge 14-Nanometer FinFET Process
Silicon-Validated Solution Developed Through Multi-year Collaboration

May 29, 2013TSMC Qualifies Synopsys’ Comprehensive Digital and Custom Solutions for 16-nm FinFET Process
V0.1 Certification Based on Collaboration over Key Foundational Technologies

May 13, 2013Achronix Tapes Out Industry's First FinFET-based System-on-Chip Using Synopsys' IC Compiler and IC Validator
Synopsys Uniquely Proven for the Emerging New Wave of FinFET-based Process Technology

Feb 21, 2013ARM and Synopsys Collaborate to Optimize ARM Mali GPU 20nm Implementation
First Mali-T658 Tapeout on 20nm Technology Based on Galaxy Implementation Platform DPT-compliant Flow

Jan 22, 2013Synopsys Accelerates Adoption of FinFET Technology with Production-Proven Design Tools and IP
FinFET Technology Support Developed over Five-year Collaboration with Industry Leaders

Dec 20, 2012Samsung and Synopsys Collaborate to Achieve First 14-nanometer FinFET Tapeout
Collaboration Encompasses Synopsys IP, Design Implementation, Extraction and Signoff Tools

Dec 12, 2012Imec and Synopsys Expand FinFET Collaboration to 10 Nanometer Geometry
Collaboration Enhances Synopsys' Sentaurus TCAD Models for Next-generation FinFET Technology

Oct 15, 2012Synopsys and TSMC Collaborate for 20nm Reference Flow
Design Tools in Synopsys® Galaxy™ Implementation Platform selected in 20nm Reference Flow for Physical Implementation, RC Extraction, Timing Analysis and Physical Verification

Jun 04, 2012Synopsys and Samsung Deliver a Complete Solution for 20-Nanometer Node
Solution Includes Place and Route, Physical Verification, and Signoff Design Tools

May 29, 2012TSMC Certifies Synopsys Design Implementation Tools For 20 Nanometers
Certified tools include IC Compiler, IC Validator, StarRC, PrimeTime and Custom Designer

Mar 28, 2012Synopsys' Collaboration with Industry Consortium Yields Double Patterning Technology Models for Parasitic Extraction
IMTAB Group in IEEE-ISTO Ratifies Interconnect Technology Format Extensions for 20nm



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