Synopsys Enables Silicon Success for GLOBALFOUNDRIES First Complex 20-nm Design
Dec 16, 2011

Bridging Digital and Custom Domains
Digital and custom (mostly meaning analog) design domains have remained stubbornly separate for a long time...But chips aren’t so neatly segregated now [and] the two flows don’t really work together well. Synopsys recently announced an improvement to this process that provides for a seamless, lossless transfer of information back and forth between domains.
Oct 17, 2011

EDACafe: Synopsys IC Compiler with Zroute Technology Achieves Successful Tapeout for Infineon Automotive Microcontroller
IC Compiler's Zroute provided a near 100 percent redundant via rate, enabling leading-edge device reliability and allowing Infineon to successfully tape out the lead product of its high-performance automotive 32-bit microcontroller platform in an advanced embedded Flash technology.
Jun 09, 2008

EDA DesignLine: Design Challenges Drive Need for New Routing Architecture
Timing, area, power, and signal integrity have traditionally been the primary objectives of design technology. Increasingly manufacturability and yield have also become critical design objectives, especially for technology nodes at 90 nanometers (nm) and below.
May 27, 2008

Synopsys donates technology to Accellera low-power effort
SAN FRANCISCO — Top-tier EDA vendor Synopsys Inc. said Tuesday (Sept. 19) it has donated power management technology to the Unified Power Format (UPF) standardization effort of EDA standards organization Accellera.
Sep 19, 2006

Power integrity analysis for billion-transistor full-custom designs
While the move to advanced process technologies has enabled levels of integration to reach new heights, engineers must now work harder than ever to realize those benefits.
Sep 17, 2006

Critical Area Optimizations Improve IC Yields
The move to advanced nanometer nodes and new process materials is diminishing semiconductor designers’ ability to estimate and realize device yields.
Jan 09, 2006

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