Hercules DRC and LVS 

Technology-Leading Physical Verification Solution for 45nm and Above 

Hercules™ DRC and LVS is a hierarchical, production-proven physical verification tool suite used at many of the world’s largest IDMs and is qualified by all major foundries. For high performance, Hercules’ unique dual mode processing provides excellent scalability and turnaround time, even for the largest designs. For ease of use, Hercules’ VUE graphical user interface enables fast debug and interactive debug of multiple shorts. As an integrated component of the Galaxy™ Design platform, with production-proven links to IC Compiler and StarRC™, Hercules DRC and LVS offers customers the performance and capabilities needed for comprehensive verification with foundry certified signoff. Hercules is a technology-leading physical verification solution for 45nm and above.

Hercules Design Rule Checking
Hercules DRC encompasses an extensive set of functionality designed to verify the manufacturability of any design, on any process technology down to 45nm. Some key features include:

  • All angle dimensional checking including spacing, length, grid, area, size, enclosure, intersection and overlap
  • Path based point to point measurement
  • Multiple rule enclosure end-of-line measurements
  • Measurement support for any edge-to-corner, corner-to-corner combination

Fastest Turnaround Time
Hercules DRC was the first tool to include hierarchical processing and is the first to utilize a combination of distributed processing and multi-threading capabilities to significantly reduce verification time. The Hercules core engine scales across multiple CPUs to enable fast physical verification time. This combination of distributed processing and multi-threading provides any customer, using any design style, to optimize verification performance.

Hercules VUE
Hercules VUE is designed to simplify design debug by integrating with leading layout tools and environments to effectively navigate design violations detected by Hercules DRC, ERC and LVS. This graphical debug environment is capable of linking to a variety of different design and layout environments such as Synopsys’ IC Compiler, Custom Designer LE and IC Workbench Plus, as well as third party tools such as Cadence’s Virtuoso Custom Design Platform and Springsoft’s Laker Custom Layout System. This allows the designer to debug in their layout environment of choice, maximizing productivity.

In addition to traditional error viewing, zooming and cross probing between layout and schematic, Hercules VUE supports the industry's first incremental short finding capability. Using a specialized connectivity database, the results from a single LVS run can be used to rapidly navigate and repair multiple shorts. This flow saves significant amounts of time and iterations traditionally associated with LVS debug.

Hercules PVS DRC Performance

Design Efficiency with Galaxy Platform Integration
Hercules leverages the capabilities of the Synopsys Galaxy Design platform for tight integration with tools such as IC Compiler and StarRC. Design data and tool results are easily shared between Hercules and other Galaxy platform tools to enable fast and flexible DRC, ERC and LVS checking. With all tools sharing a single common database, time-consuming data translation steps, the risk of translation errors, and the headache of database incompatibilities are eliminated.

In addition, Hercules offers yield enhancing solutions such as antenna prevention and advanced DRC checks in the implementation loop. Similarly, a proprietary cross reference interface between Hercules and StarRC provides layout designers with industry’s best cross reference annotation for transistor analysis.

SignOff Qualified
Foundry Supported SignOff
Through partnerships and reference flows with the world’s leading foundries, including TSMC, UMC, IBM, Chartered and SMIC, Hercules offers optimized, qualified runsets and proven correlation to foundry silicon. Production proven down to 45nm, Hercules is used by leading semiconductor companies for its accuracy, turnaround time and capacity required for signoff-level verification of the largest designs in the industry.

For more information about this product, please contact your local Synopsys representative or visit synopsys.com.