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Jun 04, 2015Intel Custom Foundry Certifies Synopsys Implementation Tools for 14-nm FinFET Production
Galaxy Design Platform-based Implementation Flow Available Today for 14-nm

Jun 03, 2015Toshiba Standardizes on PrimeRail for Rail Signoff
Superior Performance and Accuracy, Combined with In-Design Early Analysis Boosts Design Teams' Productivity

Jun 03, 2015Nationz Accelerates Design Closure with PrimeRail Signoff Solution
PrimeRail Dynamic Analysis Deployed in Production Design Flow

Apr 21, 2015Synopsys' Modeling of 10-nanometer Parasitic Variation Effects Ratified by Open-Source Standards Board
Collaboration with Leading Semiconductor Companies and Foundries Delivers Silicon Accuracy with No Change in IC Design Analysis Flows

Dec 17, 2014Synopsys' PrimeTime ADV Achieves Rapid Adoption for Fastest Timing Closure
Adopted by More than 70 Semiconductor Companies with Over 50 Tapeouts in First 9 Months

Oct 08, 2014TSMC Selects Synopsys as "2014 Partner of the Year" for Interface IP and Joint Development of 16-nanometer FinFET Plus Design Infrastructure


Oct 08, 2014HiSilicon Chooses Synopsys' PrimeTime ADV for Faster Timing Closure
Achieves Single-pass Timing and Power ECO Closure on Multiple Tapeouts Including FinFET

Sep 30, 2014Synopsys Announces New Additions to Liberty to Significantly Speed up Timing Closure
Single, unified Liberty variation format standardized by the IEEE Industry Standards Board

Jun 03, 2014Synopsys and Intel Collaborate to Enable 14-nm Tri-Gate Design Platform for Use by Customers of Intel Custom Foundry
Extends Production-Proven 22-nm Design Enablement to 14-nm for Cloud Infrastructure and Mobile Market Segments

Jun 02, 2014Samsung and Synopsys Deliver Design Tools and IP for 14-nm FinFET Process
FinFET-ready Silicon-proven Tools and IP Available for Immediate Design of SoCs

Apr 14, 2014TSMC Certifies Synopsys Digital and Custom Solution for V1.0 N16 Process
Certification Enables Designers to Realize the Power, Performance and Area Benefits of FinFET Technology



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