PrimeTime Special Interest Group (SIG)  


The Synopsys PrimeTime SIG is an active community for all PrimeTime users and design engineers who want to stay connected with the latest developments in the field of Static Timing Analysis (STA.) This PrimeTime SIG webpage will continually be updated with information about SIG events worldwide, informative technical articles, white papers, as well as the latest on PrimeTime technology development.

Increasing design size and complexity are putting tremendous pressure on design schedules. By staying abreast of the latest developments in STA, design teams can help maximize tool effectiveness and throughput to accelerate design closure.

A PrimeTime SIG event was held in Japan on January 29th 2010, on the second day of the Electronic Design and Solution Fair (EDSFair 2010) in Yokohama, Japan. About 100 PrimeTime users and managers attended the event from more than 25 semiconductor companies. The focus of this SIG was a discussion on performance and productivity. Over lunch, attendees had the opportunity to talk with industry peers and PrimeTime R&D.

PrimeTime R&D director, Bill Shu, provided updates and insights into PrimeTime’s future performance and productivity plans and how they will impact our users.

A timing expert from Renesas, Michio Komoda, shared his experiences with the new PrimeTime add-on, Galaxy Constraint Analyzer, currently in limited availability. Komoda-san highlighted key benefits of how novice users were able to ramp up within a day’s training and identify SDC quality and debug root causes in minutes. He reported that it saved them 50% turn-around-time by switching to this new tool.

Speaker Bios for Japan SIG
Bill ShuBill Shu
Director, PrimeTime R&D, Synopsys Inc.
Timing Analysis in the Nanometer Era, Performance challenges and solutions

Bill Shu highlighted PrimeTime’s approaches to address performance and productivity challenges. He presented highlights of the new Galaxy Constraint Analyzer offering and how it can boost user productivity for constraint analysis and debug.

Michio KomodaMichio Komoda
Sr. Engineer, DFM & Digital EDA Technology Development, Renesas Corp.
Constraint Analysis and Debug

Michio Komoda discussed current approaches to creating clean timing constraints, highlighted features of Synopsys’ Galaxy Constraint Analyzer and shared Renesas’ results using the new tool.

Pictures from Japan SIG
Presenters & TeamAudience

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