PrimeTime Special Interest Group (SIG) at DAC 2013 

 

The Synopsys PrimeTime SIG is an active community for all PrimeTime users and design engineers who want to stay connected with the latest developments in the field of Static Timing Analysis (STA).


PrimeTime SIG at DAC 2013

A PrimeTime SIG event was held in Austin, TX during DAC 2013, Monday, June 3, 2013. The topic of this SIG was Advanced ECO Methodology. IC Compiler and PrimeTime R&D were on hand to interact with attendees.

Customer presentations are available for download from SolvNet.

Speakers

Robert Hoogenstryd - Introduction
Synopsys
Dir. of Marketing for Signoff
Robert welcomed the audience and introduced the panel moderator.


Rajesh Gupta – Moderator
Samsung
Rajesh Gupta, Director, Design Methodology, Samsung Austin R&D Center, moderated the event and gave an introduction to Advanced ECO Methodology.


JC Lin
Synopsys
JC Lin, Vice President of Engineering for the IC Compiler team, introduced the latest implementation technologies in IC Compiler, including new features that minimize physical impact during ECO implementation.


Jacob Avidan
Synopsys
Jacob Avidan, Vice President of Engineering for the PrimeTime team, introduced the latest advanced timing technologies in PrimeTime, including new features that accelerate design closure for high-speed low-power designs, and physically-aware ECO techniques for the most advanced technology nodes.


Christophe Matheron
STMicroelectronics
Christophe Matheron shared the ST experience on evaluating the latest ECO technologies from IC Compiler and PrimeTime. He highlighted the evaluation results of the IC Compiler Minimum Physical Impact (MPI) implementation and PrimeTime physically-aware ECO guidance. The two new technologies working together improved the fix rate on a physically challenging design by 80%, reduced the added area by 75%, and significantly reduced the TAT of timing closure.


Kris Holt
Altera
Kris Holt provided insight into the challenges of increasing power consumption on embedded high performance IPs in Altera's latest FPGA products. He shared how PrimeTime leakage recovery was able to reduce the high leakage power cells in the design by 71% without any impact to signoff timing QoR. He also shared his vision on PrimeTime physically-aware ECO and examples in his designs that will benefit from the new capabilities.


PT Patel
Qualcomm
PT Patel shared how the PrimeTime advanced latch analysis reduced pessimism and improved ECO QoR on his latch based designs. He also highlighted how PrimeTime leakage recovery reduced leakage power by 15% on a fully power optimized design. At the end of his presentation, he showed how the Galaxy ECO flow reduces the turnaround time and efforts of timing closure, and how that can be further reduced by IC Compiler MPI implementation and PrimeTime physically-aware ECO technologies.

PrimeTime SIG DAC 2013 Panel
PrimeTime SIG panelists

PrimeTime SIG DAC 2013 Audience
PrimeTime SIG audience of 285
PrimeTime SIG DAC 2013 Brazos Bar
Brazos Hall (where the event took place)

PrimeTime SIG DAC 2013 Rooftop
Brazos Hall rooftop (networking, dessert and entertainment)
PrimeTime SIG DAC 2013 Lincoln Durham
Entertainment by Lincoln Durham

 
 


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