The Synopsys PrimeTime SIG is an active community for all PrimeTime users and design engineers who want to stay connected with the latest developments in the field of Static Timing Analysis (STA).
PrimeTime SIG at SNUG Japan 2012
On July 12, 2012, Synopsys hosted the annual PrimeTime® SIG event during SNUG Japan2012 in Tokyo. This time, the event featured PrimeTime Simultaneous Multi-voltage Timing Analysis. Synopsys R&D provided deeper insight into this technology and its usage on multi-voltage domain designs. The presentation showed how designers can reduce their multiple timing runs on different voltage domains down to a single timing run, and achieve signoff quality results. Renesas Electronics shared their deployment experience on live designs and how they saved precious design cycle time using this technology.
The customer presentation is available for download from SolvNet.
Yoshikawa-san summarized the SMVA experience at RenesasEL with specific examples. He highlighted a 5X TAT savings by incorporating this technology in their timing flow and eliminating 40,000 false violations that did not need fixing.
Bill explained the need for SMVA technology on low power designs and how it reduces the expensive 2n runs down to a single run and eliminates the need for additional margining. He played a live demo on the usage of this technology and the benefits noticed. The live demo is also available here (a SolvNet ID is required for log-in): http://www.synopsys.com/cgi-bin/protected/ptdemos/reg.cgi?file=simultaneous-multi-voltage-aware-timing-analysis.html
Question and Answer Session Panelists
Toshikatsu Hosono, Director, Fujitsu VLSI, Limited
Isao Tanaka, Manager, Panasonic Corporation
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Michio Komoda, Manager, Renesas Electronics
Bill Shu, Synopsys, Inc.
Atsushi Yoshikawa, RenesasEL
Question and Answer session with Synopsys, Fujitsu, Panasonic, and RenesasEL