Proteus MetroKit 

Efficient Metrology Interfacing 

Overview
Proteus MetroKit is a toolset designed to facilitate and automate the process of interfacing with metrology tools, thereby minimizing tool downtime and maximizing engineering efficiency. The toolset provides the ability to generate test patterns for modeling, automate the creation of metrology recipes for empirical data collection, reformat and analyze empirical data collected from the metrology tool for use with other Proteus applications, and create gauge files for model tuning. This product is offered as an upgrade option to IC WorkBench Plus (ICWB Plus) and Proteus WorkBench (PWB).

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Metrology tool time and engineering time are far from a commodity. Synopsys is aware of this and has developed a toolset to make the most efficient use of each. MetroKit’s Scanning Electron Microscope (SEM) Recipe Creator allows you to program the CD-SEM offline eliminating unnecessary down-time in the fab.

Avoid costly human errors and save time by automating the SEM data analysis and conversion process. A seamless link is provided between the SEM results database and the modeling tools. SEM data is screened for outliers and automatically converted to the format required for model generation prior to passing it to the OPC model calibration tools ProGen and ProGenPLUS, and/or the Synopsys Sentaurus Lithography simulator. The process results in increased data quality and reduced time to accurate model.

Test Pattern Generator (TPG)
TPG is a parametric-based pattern generator designed for lithographers and OPC engineers. It allows for the creation of test patterns to capture lithographic and other process effects necessary for accurate model tuning and prediction. TPG generates all the necessary files for model calibration and recipe tuning including Gauge files (.ggs), Highlight files (.hlt), ASD files (.asd) or PFM files (.pfm).

TPG key features
  • Intuitive and flexible GUI environment for generating calibration structures and custom test chip templates
  • `Extensive application programming interface or API provides a Tcl based interface to fully automate the tool with complete access to all functionality available within the GUI
  • Library Browser – Provides access to many standard test pattern structures as well as the ability to populate user defined test pattern structures
  • Link to Sentaurus Lithography – Any patterns created in TPG can be reused inside Sentaurus Lithography for rigorous simulation


Figure 1: Model generation flow

SEM Recipe Creator (SEMRC)
SEMRC automates the creation of CD-SEM recipes by generating measurement sites for any design or post-OPC graphics. The locations and a graphical representation of the wafer pattern at those locations are created in a format that can be read by Hitachi Design Gauge and Applied Materials’ OPC Check. A Tcl based API provides the ability to fully automate the tool.

SEM Data Extractor (SEMDE)
Import CD-SEM data and identify outliers in your data with ease. SEMDE provides an easy to use interface for reviewing SEM measurement result, so you can quickly identify bad data points, remove them, and reformat the data for model generation.

SEM Gauge Generator (SEMGG)
SEM contours are automatically converted to gauges and an ASD file (.asd) is created for OPC model calibration with ProGen. Once a model is generated, SEMGG can be used for model validation to assess a model’s predictability.

Key SEM tool features
  • Fully supports gauges and layout clips from any source
  • Flexible advanced programming language for automation
  • Offline SEM recipe generation
  • Easy importing and analysis of data from SEM
  • Seamless link for incorporating contours into your model tuning

For more information please contact your local sales representative or email us at manufacturing@synopsys.com