Formal Equivalence Checking 

Comprehensive Equivalence Checking Accelerates Innovation 

Synopsys offers powerful tools that address the need for equivalence checking of large, complex, multi-voltage SoCs, all types of memories, full custom logic and I/Os. With unique and patented technologies, including Hier-IQ, datapath targeted solvers and symbolic simulation, users obtain the most comprehensive equivalence coverage available. The Synopsys formal equivalence checking suite includes Formality for complete synthesis-flow verification, Formality Ultra that adds ECO implementation assistance and advanced debugging, ESP-CV for full-custom, memory verification.

 
  • ESP-CV
  • Functional verification for full custom designsmore

 
Fast, complete coverage to ensure functional equivalency between two design representations


 
A high-performance equivalence checking tool that uses formal, static techniques to determine if two designs are functionally equivalent
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  • Minimize tape-out risk by providing complete verification coverage.
  • Easy to use tools shorten time-to-results of multi-million gate designs
  • Verifies entire SoC, including logic, datapath, custom macro, memory and I/Os