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Solutions Include Galaxy Custom and Digital Implementation, Discovery Verification Platform

Multi-year Collaboration Results in Deployment of Synopsys' Advanced Formal Debug Technology for Verification of PowerVR Graphics Intellectual Property (IP) Cores

Companies extend system-on-chip (SoC) verification collaboration on simulation, debug and verification IP. Synopsys today announced advancements in its longstanding verification collaboration with Freescale® Semiconductor. With a focus on addressing the increasing complexities of SoC verification, Freescale teams are leveraging Synopsys' innovations in next-generation verification IP (VIP), simulation performance, debug technology and methodology development. This collaboration is targeted to achieve better schedule predictability and lower overall verification costs for Freescale's complex SoCs.

Next-generation Discovery VIP provides high performance, advanced features, and ease-of-use to accelerate SoC verification. Synopsys announced that Elliptic Technologies, a technology leader in embedded security solutions for mobile, networking, smart grid and automotive markets, successfully deployed Synopsys' Discovery Verification IP (VIP) for the ARM® AMBA® protocol for verification of its new-generation Multi-Packet Manager security protocol accelerator (CLP-630). Elliptic cited performance, efficient ease-of-use and smooth deployment as some of the key benefits of Discovery VIP.

Next-generation Discovery Verification IP Enables Identification and Debug of SoC Performance Bottlenecks. Synopsys announced that its next-generation Discovery™ Verification IP (VIP) for the ARM® AMBA® 4 AXI4™ protocol now offers a Performance Checker capability. This capability enables system-on-chip (SoC) verification teams to analyze and validate SoC performance using metrics established during the system architecture definition process, speeding up the debug of SoC performance bottlenecks.

Performance, intelligent debug and advanced coverage features led to selection of next-generation VIP. Synopsys today announced that the storage solutions division of Hitachi, Ltd. has selected Synopsys' Discovery™ Verification IP (VIP) for the ARM® AMBA® AXI3™ protocol for verification of Hitachi Virtual Storage Platform. Enabled by Synopsys' next-generation VIPER architecture, Discovery VIP demonstrated a performance advantage over other VIP, as well as delivered protocol-aware debug capabilities and advanced built-in coverage features, which have accelerated Hitachi's Storage Systems verification closure process.

The site provides a centralized online resource of relevant forums and blogs focused on verification of industry-standard protocols. VIP-Central.org is the go-to source for the latest technical information and discussions on the use of verification IP and advanced verification methodologies to verify protocol-based IP as well as IP integration, SoC sub-systems and full SoCs. VIP-Central.org aggregates information from industry experts across the verification community, providing best practices and ideas for better verification performance, protocol debug, methodology, verification planning, coverage management and ease-of-use.

Expands Collaboration to Further Accelerate SoC Verification. Synopsys, today announced a multi-year agreement to provide Advanced Micro Devices, Inc. (AMD) with its next-generation Discovery™ Verification IP (VIP). Based on the new VIPER architecture, the recently announced Discovery VIP family provides inherent performance, ease-of-use and extensibility to speed and simplify verification of the most complex system-on-chip (SoC) designs. This agreement covers a variety of VIP titles including USB 3.0, ARM® AMBA® AXI™ interconnect, SATA 3.0, PCI Express® Gen 3, and MIPI, as well as Synopsys' Protocol Analyzer, a unique protocol-aware SoC debug environment.

Offers First-to-Market VIP for the Emerging NVMe Storage Interface Protocol

Discovery VIP delivers up to 4X faster performance, rapid configurability, efficient protocol-aware debug, and quicker protocol compliance closure

VCS support for OVM 2.1.1 and the upcoming UVM 1.0 enables smooth migration to faster verification

Comprehensive Support for Low Power Techniques and High Level of Accuracy Significantly Improve Bug Detection. Synopsys, Inc. today announced that ST-Ericsson has adopted Synopsys' MVSIM low power dynamic verification solution for its STw8500 system-on-chip (SoC) platform for the mobile phone market. ST-Ericsson selected MVSIM for its proven ability to comprehensively verify low power techniques, including standby and built-in automated low power assertions, which enable the early detection of bugs.

Synopsys, Inc; today announced that Verivue, Inc. has standardized on the production-proven VMM verification methodology and VCS® functional verification solution, both key components of Synopsys' Discovery™ Verification Platform, for the verification of their flagship product, the MDX 9000 Series Media Distribution Switch.

Synopsys, Inc. today announced that Tego, Inc. has standardized on the production-proven VMM verification methodology and VCS® functional verification solution, both key components of Synopsys' Discovery™ Verification Platform, to verify their radio frequency identification (RFID) tags for the aviation industry.

Synopsys, Inc., a world leader in software and IP for semiconductor design and manufacturing, today unveiled new multicore technology within the VCS® functional verification solution, a key component of Synopsys’ Discovery™ Verification Platform. VCS multicore technology delivers a two-times (2x) improvement in verification performance by harnessing the power of multicore CPUs.

Enhancements to Industry's Most Proven Verification Methodology Include New Base Classes and Performance Analyzer Application

Addition of Altera Stratix III FPGA-based prototyping boards targets algorithmic design and early software development

sset Acquisition to Facilitate Expansion in the Fast-Growing Rapid Prototyping Segment

Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced that Chipright, CreVinn and Verilab, three leading European chip design and verification consulting companies, have standardized on the proven VMM verification methodology to streamline verification and speed time-to-market for their customers.

HSPICE, HSIM and WaveView Analyzer Deliver First-silicon Success

Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced that it has collaborated with ARM and Renesas Technology to define the industry's first methodology to address the rapidly increasing complexity of low power verification.