Synopsys
Ansys

The Industry’s Highest Performance Simulation Solution

The Synopsys VCS® functional verification solution is the primary verification solution used by a majority of the world’s top semiconductor companies. VCS provides the industry’s highest performance simulation and constraint solver engines. VCS’ simulation engine natively takes full advantage of multicore processors with state-of-the-art HyperSim technology for SoC simulations, enabling users to easily speed up high-activity, long-cycle tests by allocating more cores at runtime. HyperSim uses hardware intelligent algorithms to leverage parallelism to optimize dynamic scheduling, synchronization overhead, dynmic load balancing, cache efficiency and overall simulation performance for the target processor architecture. 

VCS has innovative features to achieve higher performance and enable shift left verification flows early in the design cycle to catch additional bugs. Synopsys Design Constraints (SDC) Verification, Intelligent Coverage Optimization (ICO), Dynamic Performance Optimization (DPO), and Dynamic Test Loading (DTL) are innovations that significantly expand the application of the solution.

Combining Synopsys VCS with VC SpyGlass Lint leads to faster, higher-quality verification cycles, reduces project risk, and streamlines the path from RTL to tapeout. In addition, the comprehensive VCS solution offers Native Testbench (NTB) support, broad SystemVerilog support, verification planning, coverage analysis and closure, and native integration with Synopsys Verdi® debug, the industry’s de-facto debug standard. VCS is uniquely positioned to meet designers and verification engineers needs to address the challenges and complexity of today’s SoCs. 

Key Benefits

Industry’s Highest Performance Simulation Solution

Industry-leading performance and capacity

  • Compile time: Partition and distributed compile, dynamic reconfiguration
  • Runtime: Dynamic test loading, Save/Restore, constraint solver optimization, HyperSim

Advanced simulation technologies

  • Native Low Power, Xpropagation, Direct Interfaces (DKI, DPI) to High-Level Modeling (SystemC, MATLAB®) and AMS simulation
  • Dynamic SDC-aware verification with Multi Cycle Path and False Path verification
  • Intelligent Coverage Optimization
  • Dynamic Performance Optimization
  • Testbench coverage - line coverage on testbench classes helps assess testbench quality
  • HyperSim for long running SoC simulations
  • Simulation acceleration with ZeBu® emulation system to provide higher performance

Comprehensive planning, coverage and execution management native integration

Synopsys VCS Diagram

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