Power-aware verification of advanced low power designs (analog and digital) is a top concern for products at 65 nm and below. Voltage-aware functional verification
in Synopsys' advanced low power solution
is comprised of VCS
Native Low Power (NLP) simulation with MVSIM
NLP, and MVRC
, a voltage-aware static checker that offers comprehensive coverage for all advanced power management functions. The voltage-aware checking, modeling and simulation technology in MVSIM NLP and MVRC provide the needed accuracy and verification coverage for all low power designs, including the most advanced mobile SoCs with fine-grained power management. MVSIM NLP and MVRC support comprehensive rules checking and analysis of power state transitions, power shutdown, and multi-rail macros and the like, to enable designers to rapidly find and fix low power bugs. HSPICE
test for non-digital effects, such as leakage power, floating nodes and dynamic IR drop. The overall result is a completely verified power-managed design.