Emulation

Billion Gate, Multi-user ASIC and SoC Emulation

With increases in the size and complexity of today's SoC hardware and embedded software designs, massive testbenches and tests spanning billions of cycles are becoming the norm. Meeting these challenges requires advanced verification technologies delivering the highest performance possible. The Synopsys suite of ZeBu emulation solutions are tightly integrated, best-in-class emulation technologies that deliver the best price-performance in the industry. These solutions include ZeBu-Server and ZeBu-Blade2 for emulation, zFast, ZEMI-3, ZeBuWare and transaction-based VIP, for fast bring-up time, and ZeBu Debug, a comprehensive suite of emulation-based debug tools.

Tools
Solutions

ZeBu-Server
Billion gate acceleration and emulation for the enterprise more

Up to 10MHz, multi-user solution for SoC verification

ZeBu-Blade2
Acceleration and emulation for the desktop more

A single-user solution supporting up to 32 million ASIC gates at up to 12MHz

ZEMI-3
Behavioral SystemVerilog Compiler for Transactor BFMs more

Easily create high performance, custom transactor models

Emulation Validation IP
A family of application specific validation platforms for emulation more

over 30 validation platforms that allow you to quickly build a complete system-level emulation environment

zFAST
ZeBu fast synthesis more

A synthesis tool for ZeBu emulators, supporting SystemVerilog, Verilog, VHDL, and mixed language designs

ZeBu Debug
A comprehensive suite of debug tools for emulation more

Quickly find and correct bugs in your SoC design

ZeBuWare (ZW-FPGA)
FPGA-synthesizable, DesignWare compatible library more

A library that offers RTL source code for the most commonly used DesignWare™ Foundation Library components.

HW Verification, Early HW/SW Co-Verification and Pre-Silicon Software Verification are critical to guarantee that your end product will be fully functional and meet its design goals, on time. ZeBu fast emulators provide comprehensive HW assisted verification solutions across the entire SOC development cycle, increasing design quality, and reducing the need for costly re-spins.

Early in the project, speed up your existing Verilog, VHDL or SystemVerilog simulation by an order of magnitude with Simulation Acceleration
Exhaustively test all your sub-systems with Super-Block Verification
Use Fast SoC Emulation to verify the full chip integration
Perform HW/SW Co-Verification and embedded Software Verification

ZeBu’s support for embedded processor models is critical for early SOC HW/SW Co-Verification and Pre-Silicon Software Verification.

Fast and efficient Transaction-Level Modeling is the enabler for many of the ZeBu emulator's flexible solutions. It is the underlying technology behind ESL Co-Emulation, and enables a "Smart" Debug methodology.

ZeBu is not only useful for SOC and ASIC verification. Its high-performance, compact hardware makes it the ideal vehicle for Reconfigurable Computing Reconfigurable Computing.

You can also visit our case studies, datasheet and success stories sections for more information of ZeBu products and their applications.