Synopsys provides the e-zTest family of over 30 application specific validation platforms that allow you to quickly build a complete system-level test environment for your SoC design emulated in the ZeBu system. Synopsys' validation platforms are available for common protocols such as PCI Express 3.0, AMBA Protocols, USB 2.0, MIPI CSI-2 and MIPI DSI, I2C, I2S, Gigabit Ethernet and 10 Gigabit Ethernet, Digital Video, JTAG, etc.
These validation platforms include transactors with synthesizable bus functional models (BFMs) which are mapped into the ZeBu Re-configurable TestBench (RTB) hardware, providing maximum performance and ensuring that the transactor is always synchronized to the emulated design.
Each validation platform also includes C/C++ APIs to quickly create test benches and drivers to generate real-world traffic, and to link to ESL virtual prototypes. Data monitors, application specific debug display windows, virtual speed adapters to real hardware and networks, and data analysis and export functions provide the tools to evaluate your test results quickly and efficiently.
Off-the-shelf e-zTest platforms are complemented by the ZEMI-3 transactor compiler, so you can generate your own ZeBu-compatible custom synthesizable transactors quickly. e-zTest validation platforms are fully compatible with ZeBu’s interactive design debugging, supporting single-stepping of the clocks and waveform generation with Dynamic Probes and Combinational Signals Accessibility (CSA).
Download e-zTest Validation Platform Datasheets
In-Circuit Emulation ZeBu IP (ICE-ZIP)
Synopsys also offers In-Circuit Emulation (ICE) ZeBu IP, including board and speed-rate adapters, to connect the emulated design to target hardware systems. Example interfaces include: SCSI, ERNI, PCI, DVI video, JTAG pods, etc.
Because of ZeBu's higher speed of emulation, at-speed interfaces are easier to hook-up than with traditional emulation systems.
Synopsys also offers off-the-shelf memory models for most standard memories, such as SDRAM, DDR, DDR2, DDR3, RLDRAM, Mobile DDR, LPDDR2, and GDDR5. These models leverage on-board memory resources, and are completely synchronized with the emulated design, eliminating any issues with timing or refresh cycles. Plus, they are configurable; different memory families (e.g. SDRAM or DDR2) can be implemented in the same ZeBu hardware. No cards/DIMMs need to be plugged or unplugged/added or removed to switch between models.
Contact us for a complete and up-to-date list of available Validation IP.
If you need to write your own custom transactor, you can use ZEMI-3, Synopsys' SCE-MI 2.0 compatible behavioral SystemVerilog compiler that generates optimized, cycle-accurate BFMs for transactors.