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Copyright 2007 Society of Photo-Optical Instrumentation Engineers. These papers were published in the SPIE Advanced Lithography proceedings and are made available as an electronic reprint (preprint) with permission of SPIE. One print or electronic copy may be made for personal use only. Systematic or multiple reproduction, distribution to multiple locations via electronic or other means, duplication of any material in these papers for a fee or for commercial purposes, or modification of the content of the papers is prohibited. Double patterning design split implementation and validation for the 32-nm node Ensuring production-worthy OPC recipes using large test structure arrays Intelligent visualization of lithography violations for 45-nm and beyond Comparing traditional OPC to field-based OPC for 45-nm node production | ||||||||||||||||||||||||||||||
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