Contributed Articles 

Virtual Hardware in the Loop (VHIL): Earlier and Better Testing For Automotive Applications
Feb 04, 2014

Are Advanced Designs Only Possible At Emerging Process Nodes?
Jan 28, 2014

How to Bring an SMC-Generated Peripheral with Axi4-Lite Interface into the Xilinx Environment
Jan 21, 2014

Debugging With Virtual Prototypes – Part Three
Jan 16, 2014

Using USB 3.1's Multiple INS to Reach 10 Gbps Data Rates
Jan 16, 2014

Using HAPs to Streamline IP to SoC Integration
Jan 07, 2014

When I Grow Up, I Want To Be a Software Programmer
Dec 19, 2013

Synopsys Puts Physical IP Prototypes into Developers' Hands
Dec 16, 2013

Consistency Key to Gaining the Advantages of IP Integration
Dec 16, 2013

Coverage Driven Verification Isn't Complete Without Low Power Metrics
Dec 05, 2013

Where Dragons Roam
Nov 21, 2013

The Role of IP in the New Generation of Data Center SoC
Nov 21, 2013

Elevate the Consumer Multimedia Experience with HDMI 2.0
Nov 13, 2013

Standardize Your Business Social Media Practices
Nov 11, 2013

Debugging With Virtual Prototypes – Part Two
Nov 10, 2013

FinFET Impacts for Reducing Physical IP Power Consumption
Nov 07, 2013

Improving Performance through Better Delay Estimation of Sub-32nm Interconnects
Nov 06, 2013

The 12 Tenets of the Low-Power Design Gospel
Nov 04, 2013

Riding the Arm V8 Wave
Oct 29, 2013

Optimizing High-Performance CPUs, GPUs and DSPs? Use Logic and Memory IP—Part I
Oct 28, 2013

Halloween Is Going Mobile
Oct 24, 2013

FPGA-Based Prototyping to Validate the Integration of IP into a SoC
Oct 23, 2013

USB 3.0 SSIC: Low-Power Interconnect For Mobile Consumer Applications
Oct 17, 2013

What Makes FinFETs So Compelling?
Oct 10, 2013