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Managing Your Silicon Lifecycle with In-Chip Sensor and PVT Monitor IP
Stephen Crosher, Silicon Lifecycle Management Strategic Programs Director, Synopsys
Introduction
As process technologies shrink and gate densities increase, designers are integrating more complex functionality into their system-on-chips (SoCs) to maintain a competitive advantage. To bring designs on advanced process technologies to life, system architects select in-chip sensors and monitors that can provide a greater understanding of device fabrication, process variability and dynamically changing conditions in the field. The increasing variability of silicon in small geometries, combined with the non-deterministic nature of devices during operation, dictates that sensing of process, voltage and temperature (PVT) conditions within the chip is now an imperative.
In-chip monitors and PVT sensors play a key role in test, debug, and evaluation of SoCs developed for advanced process technologies. In addition, in-chip monitors can be used for model-to-hardware correlation of circuit design and timing tools. PVT sensors can track dynamic fluctuations in local power supply voltage and can directly measure silicon temperature to detect the hot and cold spots on the chip.
In-chip monitors and PVT sensors can be embedded as subsystems that can guide the decisions made by automatic test equipment during production, power management schemes during mission mode, and analytics throughout product lifecycles (Figure 1). Embedding in-chip monitors and PVT sensors can deliver significant performance and reliability benefits for planar and FinFET silicon technologies from 40nm to 3nm.
Figure 1: In-chip PVT monitoring subsystems offer an easy-to-integrate solution for checking varying conditions
In-Chip Sensor and PVT Monitor IP Offers Distributed, Responsive and Accurate Device Insights
Placing multiple sensors strategically throughout the die further enhances the benefits of accurate, low latency, and reliable in-chip monitoring technologies. Determining how a device has been manufactured will define how it will consume power and process information during silicon life cycle, even to the extent of determining its degradation and eventual demise. Increasing the granularity of sensor distribution enables real-time junction temperature sensing, monitoring supply voltage levels and assessing IR drops inherent within a floorplan design. With increased insights, designers can determine the efficacy of power control schemes to save power or optimize data throughput. Embedded sensors determine the validity and potency of optimization methods such as Adaptive Voltage Scaling (AVS) and Dynamic Voltage and Frequency Schemes (DVFS).
Use Cases
Designers benefit from embedded sensing and the subsequent analysis of sensor data in:
Design & Test Optimization – Assessment of silicon during production test, feeding-back and adjusting timing models within PrimeShield provides improved design calibration. For reliability-sensitive applications, PVT and thermally aware production testing provides improved diagnosis to failing vectors and allows for enhanced screening for known good die (Figure 2).
Figure 2: PVT-aware production test
In-Field Optimization – Silicon process analysis and real-time measurement of conditions in-chip facilitate advanced performance and power optimization schemes, including enhanced DVFS and AVS schemes.
Predictive Maintenance & Failure – Analytics solutions for continual fleet monitoring of devices from deployment to end-of-life helps to reduce unexpected in-field failures.
Synopsys DesignWare In-Chip Sensor and PVT Monitor IP
DesignWare® PVT monitoring IP from Synopsys presents a low risk solution for integration within the design flow, having standard interfacing for test and mission mode operation. Adopted widely by the semiconductor design community, the technology offered by Synopsys is broadly deployed and includes of a comprehensive set of deliverables for ease of use. The adaptable, flexible PVT monitoring configurations are used in data center, AI, high performance computing, automotive and 5G consumer applications that require high reliability.
The easy-to-integrate in-chip PVT monitoring subsystem consists of a range of sensors communicating to a central Sensor Management Hub (PVT Controller) (Figure 3). The flexible PVT subsystem supports PVT monitoring, extended sensing and analytics solutions and is a cornerstone of the Synopsys Silicon Lifecycle Management (SLM) platform. The SLM platform establishes an end-to-end solution, able to assess and measure in-chip conditions continuously throughout a silicon chip’s lifetime, from fabrication to end-of-life. PVT monitors in the SLM platform provide meaningful insights into critical performance, functionality, reliability, safety and security challenges during a chip’s lifespan. The SLM platform enables the optimization and analytics of operational activities for all phases throughout the life of an SoC. When multiple teams are involved in the development and delivery of complex silicon solutions, including design, bring-up, test as well as the end-users of systems, the SLM platform provides unparalleled insights.
Figure 3: Sensor Management Hub (SMH) and embedded sensor architecture
Summary
The physical constraints of advanced node technology development define the boundaries within which we are able to fulfill our requirements for electronics products and systems. Leading-edge SoCs on advanced nodes have now moved beyond the point where embedded sensing is optional or simply a ‘nice to have.’ By continually evolving in-chip sensor technologies, designers can create useful sources of data within the silicon. The more insightful and meaningful the data the more designers will have the insights needed to increase performance, optimize power and extend reliability of the entire silicon lifecycle of their electronics systems.