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Eclypse Low Power Solution Seminar
Overview
Power has become an increasingly critical issue for the semiconductor industry, not only for traditionally power-conscious applications such as wireless, mobile, and consumer electronics, but also for high-performance applications that are now expected to meet energy conservation requirements while still achieving their performance goals. Shrinking process geometries have amplified the power issue, with leakage power becoming the source of as much as half of the total power consumption in a design. Furthermore, power densities become so concentrated in these smaller geometries that they cannot be properly supplied or dissipated.
Attend the free Synopsys Eclypse™ Low Power Solution Seminar to learn about the Synopsys' end-to-end, silicon-proven advanced low-power solution. Visionary perspectives on the challenges of low power, and how to address them, will be discussed by Synopsys and leading-edge low power companies. This seminar will also include a tutorial covering Synopsys' comprehensive, holistic approach to low power, where design and verification operate from s common, consistant basis for defining power intent.
Who Should Attend?
Project managers, design engineers, CAD managers, verification engineers and managers.
Agenda
| Time |
Topic |
| 8:15 – 8:45a.m. |
Breakfast and Registration |
| 8:45 – 9:00a.m |
Seminar Kickoff |
| 9:00 – 10:00a.m. |
Advanced Low Power Vision |
| 10:00 – 10:30a.m |
Coffee Break |
| 10:30 – 11:15a.m. |
Low Power Overview |
| 11:15 – 12:00 p.m. |
Introduction to UPF |
| 12:00 – 1:00 p.m. |
Lunch Break |
| 1:00 – 2:45 p.m. |
End-to-End Low Power Flow – Part 1 |
| 2:45 – 3:15 p.m. |
Coffee Break |
| 3:15 – 4:00 p.m. |
End-to-End Low Power Flow – Part 2 |
| 4:00 – 4:45 p.m. |
Demo |
| 4:45 – 5:15 p.m. |
Q & A and Lucky Draw |
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Schedule
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