|
Synopsys DesignWare IP provides designers with a broad portfolio of implementation IP, verification IP and hardened PHYs.
When combined with our large investment in quality and comprehensive worldwide technical support, DesignWare IP gives designers a faster and lower risk path to chip success.

»Play Video 05:51
|
|
See a silicon demo of the DesignWare PHY for PCI Express 2.0
Join Synopsys in our lab to see how we deliver a compliant, robust PCI Express 2.0 PHY and enable visibility into the link performance through unique on-chip diagnostics.
|

»Play Video 06:47
|
|
See how we verify the DesignWare IP for DDR2/3 PHY and Controllers
See firsthand the test equipment and custom boards developed and used by Synopsys to verify our DDR IP.
Witness full speed write and read data eyes, at speed functionality testing, duty cycle and phase error tests and jitter analysis results.
|

»Play Video 05:34
|
|
Join us in the Synopsys lab to see how we verify the DesignWare USB 2.0 NanoPHY IP
The video will take you through our silicon verification board set up, show the unique tunability feature and highlight the extensive characterization process of the USB 2.0 nanoPHY.
|
 |
| "Above all we need IP that we can trust, and Synopsys has proven its trustworthiness to us." |
 |
Anil Jain, Vice President of IC Engineering Cavium Networks |
|
|