MVSIM Comprehensive Voltage-Aware Simulation

Overview
With shrinking geometries and increasing functional complexities, power management has become a critical component of product design. Various forms of multi-voltage control techniques are used to manage power. With multiple voltages controlling the functionality of a design, verification complexity and accuracy have become prominent issues. A multi-voltage design requires verification of the functional states in all of the power states as well as verification of power transitions and sequences. Power-managed designs also require accurate interpretation of voltages. A single error could place the design into an unknown state causing the design to lock-up or function erratically. Traditional simulations do not interpret the waveform nature of voltages nor do they provide comprehensive coverage for all voltage-control schemes.

MVSIM is a voltage-aware co-simulator that has a complete understanding of the waveform nature of voltage and allows engineers to comprehensively verify correct behavior of designs that use voltage control techniques for power management.

MVSIM Key Features and Benefits

• Comprehensive coverage for all multi-voltage techniques saves debug time and lowers product cost
• Complete understanding of power intent expressed in industry standard Unified Power Format (UPF) allows for comprehensive coverage of multi-voltage design techniques
• True voltage-aware simulation implies maximum accuracy
• Automatic built-in assertions mitigate the risk of undetected bugs and reduce verification time and increase accuracy
• Voltage-aware modeling of power components such as voltage regulators, level shifters, and power switches increases accuracy of power verification
• Customizable error and warning messages allow for easy integration with customer's flow

MVSIM Fits into existing design flows
MVSIM is a co-simulator that works with functional simulators such as VCS® through a Verilog Procedural Interface (VPI) Programming Language Interface (PLI). It takes in the same RTL or gate-level netlist representation of the design as VCS in either Verilog or VHDL and accepts the same test bench as VCS (now augmented for power management checks). Additionally, it allows the power intent to be specified in UPF.

MVSIM understands all voltage events and accurately co-simulates the design to verify all power management functions. MVSIM outputs a log file and an error and warnings report for all violations related to multi-voltage checks. See figure 1.

Figure 1. MVSIM integrates easily into existing design flow.

Unique Value of MVSIM

• MVSIM is truly voltage-aware. It detects bugs when multiple voltages transition simultaneously in a design or as a result of incorrect operation during a voltage ramping up or down
• MVSIM can completely verify voltage-control techniques such as dynamic voltage and frequency scaling, and low V_DD standby
• MVSIM has built-in automated assertions. These assertions are based on years of low-power verification expertise that have been designed into the tools. The automated assertion feature allows the verification engineers to complete the verification process much faster than requiring the engineer to write test benches and assertions for all potential scenarios for failure and mitigates the risk that the testbenches may overlook a critical condition that may cause a functional failure
• MVSIM allows for modeling of the behavior and subsequent interpretation to detect incorrect behavior in power components such as voltage regulators and level shifters

MVSIM reduces time-to-market
Figure 2 shows how a power-managed SoC today will typically have some firmware driving the power management functions. The firmware has to be verified in addition to the hardware to ensure correct functional operation of the chip under different power modes. FPGAs and emulations can't verify the firmware component of a power-management system.

Figure 2. MVRC validates power intent across the design flow.

A conventional flow using traditional simulation engines that are not voltage-aware can't verify the firmware prior to tape-out. That is because traditional simulators can't accurately model the effects of silicon on designs using multiple voltages. A conventional flow leads to debug after silicon is produced and subsequent re-spins if power management bugs are found, representing increased engineering and manufacturing costs and lost revenues because of delayed product introduction.

MVSIM is a voltage-aware simulator that understands silicon effects and treats all voltages as waveforms. SoC designers can maximize these capabilities to debug the firmware at the same time as verifying the design hardware. The result is that all the power management features can be completely verified prior to tape-out, eliminating re-spins and delivering completely functional products to market much faster.

Conclusion
Power management techniques are increasingly used to combat leakage and dynamic power consumption. Multi-voltage designs require comprehensive verification coverage of all voltagecontrol techniques. MVSIM is a truly voltage-aware simulation engine that understands the waveform nature of voltage and covers all power states, transitions, and sequences MVSIM is production proven in many customer designs.