Comprehensive Place and Route
Physical implementation in the Synopsys Design Platform provides an industry-leading, production-proven solution with IC Compiler and IC Compiler II. IC Compiler II is a complete netlist to GDSII place and route system that enables 10X faster throughput for designs across all process nodes. Re-architected from the ground up to deliver unsurpassed scalability, IC Compiler II introduces a new design infrastructure complete with a compact data model and a single timer engine. Both flat and hierarchical designs of all sizes benefit from the new technological advances in IC Compiler II including native multi-core, native multi-voltage, and native multi-hierarchy support.