The increasing number of power and reset domains are driving a greater need for reset domain crossing (RDC) analysis due to the RTL quality and software driven partial and full resets in the system. However, there are a higher number of RDC paths unlike clock domain crossing (CDC) paths because a RDC can happen on single clock domain path, and addressing millions of these paths during RTL signoff is a challenge. This webinar will explain these challenges and novel methodology to overcome the use of simple divide and rule technique. It will also include demonstration to showcase the methodology in a sample design using VC SpyGlass RDC.
Please complete the following form, then click the 'continue >>' button below.