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  Description Synchronous Single-Port, Read/Write RAM (Latch-Based)
  Name DW_ram_rw_s_lat
  Version DWBB_201603.4
  STARs Open and/or Closed STARs
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  Product Type DesignWare Building Blocks
  Overview DesignWare Building Block Components
  Documentation
  Examples Direct Instantiation in Verilog
Direct Instantiation in VHDL