coreTools 2006.03 is now available

Mick Posner

The coreAssembler tool enables the designer to automatically assemble, verify, and synthesize IP subsystems in less time than ever before. The coreAssembler tool, combined with DesignWare IP, automates the subsystem design creation and block integration of both AMBA 3 AXI, and AMBA 2.0 AHB/APB components, and also supports the leading DesignWare Digital Cores. This greatly reduces the time spent creating application specific subsystems that include DesignWare IP, allowing the designer to focus on additional product testing or differentiation. And coreAssembler fully supports the IP-XACT� Specification from The SPIRIT Consortium so 3rd-party and custom IP blocks that are compliant with the IP-XACT specification can be assembled effortlessly into a subsystem.

New Features for coreAssembler 2006.03 include the following:

Testbench assembly using DesignWare Verification IP
Assembly support for AXI/AHB/APB-based subsystems
Support for SPIRIT 1.2
Design Compiler topographical synthesis support
All legacy "DesignWare Connect" functionality now built-in to coreAssembler

This article focuses on DesignWare Library Synthesizable IP customers using coreAssembler, but the Synopsys family of coreTools is a comprehensive set of intellectual property (IP) reuse tools for the creation and integration of IP into a knowledge-based assembly flow.

The detailed list of features of coreAssembler 2006.03 includes the following:

Testbench assembly using DesignWare Verification IP

Separate implementation and testbench workspaces
New "Create Testbench" activity available when creating DesignWare Library AXI/AHB subsystems
Support for DesignWare Verification IP for AMBA 2, AMBA 3 AXI, SIO

Design Compiler topographical synthesis support
Support for subsystems for AMBA 3.0 AXI
Automatic inclusion of DesignWare Connect functionality

automatic address map generation for AXI/AHB/APB subsystems
automatic testbench generation, instantiating DW VIP (AMBA, AXI, SIO)
automatic subsystem test generation (slave connectivity test)
subsystem simulation using generated testbench/test

Support for SPIRIT 1.2 (industry-standard IP definition language)

read capability for SPIRIT-packaged IP
write capability for subsystems in SPIRIT format

Synthesis replay logs for creating synthesis testcases
Significant GUI and usability enhancements

Usage Model Change

Prior to 5.2, DesignWare Library Synthesizable IP customers were instructed to run "$DESIGNWARE_HOME/bin/dw_connect", which then would automatically invoke coreAssembler with the DesignWare Connect plug-in functionality. Starting with coreAssembler 5.2 and continuing in 2006.03, users should just invoke coreAssembler directly (and will get a message to that effect if they invoke dw_connect). When they instantiate a DW_ahb or DW_axi bus fabric, the classic functionality of DesignWare Connect will be automatically enabled.