DesignWare minPower Components offer unique, power-optimized datapath architectures that enable DC Ultra™ to automatically generate circuits that suppress excess switching activity and glitches, reducing both dynamic and leakage power for mobile devices and high-performance applications. Based on the actual switching activities, transition probabilities, available standard cells, and analysis of possible configurations, DesignWare minPower Components architectures are automatically configured by DC Ultra to implement the optimal structure with the lowest power consumption. In addition to the automatically inferable components, the DesignWare minPower Components also include more than 40 instantiable blocks that incorporate low power design techniques such as enhanced clock gating, built-in datapath gating and patented data-tracking pipeline management technology to reduce power consumption.
DesignWare minPower Components provide power savings not addressed by today's conventional low power design techniques. Because the optimization takes place at the circuit architecture level, the power savings achieved with the DesignWare minPower Components are usually additive to other methods. The unique architectures in the DesignWare minPower Components allow high-level datapath structures to be automatically optimized based on power costing and switching activities. Datapath circuit applications that have a high percentage of active time, such as wireless receivers, audio/video processors, CPUs, media processors, and signal processing blocks for high-performance networking and storage, are ideal candidates for DesignWare minPower Components.
For more information on the DesignWare minPower Components, please visit us at http://www.synopsys.com/designware.