Complete 1.6T Ethernet IP Solution
The complete Synopsys 1.6T Ethernet IP solution, consisting of 1.6T MAC and PCS multi-rate Ethernet controllers, silicon-proven 224G Ethernet PHY IP, and verification IP, is designed to meet the stringent time to market for HPC applications. The solution is based on the evolving IEEE 802.3dj standard creating a flexible system solution for next generation 400GbE, 800GbE and 1.6TbE applications. By providing a complete IP solution, Synopsys delivers latency optimization and ensures that all the IP functions seamlessly together to lower integration risk. The high-bandwidth, excellent performance of the Ethernet IP solution is optimized for low power, small area and low latency.
The robust IP solution has been extensively validated with multiple hardware platforms, PHYs, and Ethernet verification suites across a broad range of processes and foundries. With extensive expertise in PAM-4 design, and built on successful high-speed Ethernet controller designs, Synopsys’ expertise in developing and supporting the Ethernet interface enables designers to accelerate time-to-market and achieve silicon success for their advanced SoCs.
Complete 1.6T Ethernet IP Solution
- Supports 4 x 400G, 2 x 800G and 1.6T Ethernet rates with 112Gbps and 224Gbps SerDes
- Supports IEEE 802.3 and OIF-224G, OIF-112G standards electrical specifications
- Meets the performance requirements of chip-to-chip, chip-to-module, and long reach copper/ backplane interconnects
- DAC-based PAM-4 transmitter includes feed-forward equalization (FFE)
- Digital-based receiver consists of analog front-end (AFE), ADC, and advanced digital signal processor (DSP)
- High-performance receiver equalization supports channel loss of 45dB
- Low jitter phase-locked loops (PLLs) provide robust timing recovery and better jitter performance
- Includes Ethernet PCS RS-FEC functions
- Supports IEEE-managed objects, IETF MIB-II and RMON for management applications
- Supports IEEE 1588 applications