Memory Protection Options for ARC Cores
The Synopsys ARC® processor portfolio offers two Memory Protection Unit (MPU) options. One is available for the ARC 600 family, the other for the ARC EM and ARC HS families. The ARC MPU is a separately licensable configuration option.
The MPU provides protection by dividing the address space into regions associated with specific attributes such as read, write, and execute. If an attempt is made to access a region for which an associated attribute is not permitted, the ARC processor raises an exception, and prevents the faulting instruction from completing. Access violations raise a protection violation exception.
The ARC architecture divides the memory into 16 equal-size regions. The MPU provides a means for defining up to 16 variable-size regions and assigning read, write, and execute attributes for each region in user and kernel modes. The number of regions is configurable and is specified by the user. Acceptable values are 1, 2, 4, 8, and 16.
The ARC MPU is added to the processor RTL using the ARChitect GUI.
| Feature | ARC 600 MPU | ARC EM MPU | ARC HS MPU |
|---|---|---|---|
| Default region permissions | ✓ | ✓ | |
| ✓ | ✓ | ||
| ✓ | ✓ | ||
| Memory error interrupt | EV_ProtV exception | EV_ProtV exception | |
| ✓ | ✓ | ||
| ✓ | Uses EFA register | Uses EFA register | |
| 0x01 | 0x02 | 0x02 | |
| 8 KB | 2 KB | 2 KB | |
| ✓ | Renamed MPU_ECR | Renamed MPU_ECR | |
| 01 | 10 | 10 | |
| 0x0027 | 0x0023 | 0x0023 | |
| ✓ |
- Programmable read, write and execute permissions
- Separate Kernel and User mode Read/Write/Execute permissions
- 1, 2, 4, 8 or 16 memory regions, selectable at configuration time
- Minimal gate count impact, scalable with user configuration
- Default permissions, for all locations not covered by a defined region
- Designed to coexist with other protection mechanisms, such as IP (code) protection on ARC EM and HS, and ARC Secure on ARC 600