The Synopsys 800G Ethernet Physical Coding Sublayer (PCS) IP, compliant with the 400G IEEE 802.3bs standard, provides a complete set of features enabling users to define an optimized PCS in products across a range of 800G Ethernet applications. The PCS IP implements two standard 400G PCS (IEEE P802.3bs) with bonding to create an aggregate 800G PCS.
The Synopsys 800G Ethernet PCS IP is available in single or octal port configurations. The IP in either configuration seamlessly interoperates with the Synopsys 112G Ethernet PHY IP. The IP includes multiplexed Reed-Solomon Forward Error Correction (RS-FEC) functions for use by different channels at various speeds. The IP implements a 1024-bit wide CDMII for connections to the Synopsys MAC on the application side and 8-lane interface to the Synopsys PHY on the Ethernet line side. Synopsys delivers a complete Ethernet solution with 800G Ethernet PCS IP, 800G Ethernet MAC IP and 112G Ethernet PHY IP.
Description: | High Speed Ether 2/4/8-Lane 200G/400G/800G PCS |
Name: | dwc_ether_hse_800gpcs |
Version: | 2.02a-lca00 |
ECCN: | 5E991/NLR |
STARs: | Open and/or Closed STARs |
myDesignWare: | Subscribe for Notifications |
Product Type: | DesignWare Cores |
Documentation: | |
Toolsets: | Qualified Toolsets |
Download: | dw_iip_DWC_ether_hse_800gpcs |
Product Code: | G523-0 |