Synopsys CXL Controller IP

The Synopsys Compute Express Link (CXL) Controller IP implements the port logic required to build a CXL device, host or switch, and can be configured for dual-mode applications supporting runtime-selectability between device and host mode. The configurable and scalable IP supports all key required features of the CXL 3.x specification and full backward compatibility with CXL 2.0, 1.0 and 1.1 specifications. The IP also supports PCI Express 6.x, 5.0, 4.0, and 3.1 specifications, and can be easily connected to a Synopsys 64GT/s PHY through the built-in PIPE 6.x interface. The CXL controller supports Synopsys' MultiStream architecture, offering multiple application interfaces for maximum throughput efficiency across various link widths and payloads. The high-quality, synthesizable IP is optimized for maximum throughput and minimum latency in a 64GT/s x16 configuration, but can be configured to support CXL port bifurcation and degraded modes, as well as all 3 defined CXL device types for maximum application flexibility. The Synopsys CXL Controller IP integrates quickly and easily into system-on-chip (SoC) designs with a user-friendly application interfaces or industry standard AMBA interfaces, with conservative timing suitable for a wide range of ASIC and FPGA technologies.

The Synopsys Integrity and Data Encryption (IDE) Security Modules for CXL 2.0 and the Synopsys IDE Security Modules for CXL 3.x are standards-compliant and pre-verified with the Synopsys Controller IP to help designers protect data transfer in their SoCs against tampering and physical attacks. The security modules meet the required high bandwidth with optimal area and latency as low as zero cycles for CXL.cache/.mem protocols in skid mode. Synopsys CXL Controllers with IDE security IP module support TEE Device Interface Security Protocol (TDISP) for CXL.io protocol released by PCI-SIG. TDISP standardized framework defines how to secure the interconnect between virtual machine hosts and devices, regardless of where the data center resides or who has access to the servers inside. Synopsys CXL Controllers with IDE enable designers to build full TDISP support in their hyperscale SoCs and mitigate against data and system attacks, addressing the challenges of secure I/O virtualization. Learn about the broad portfolio of Security Solutions for Interfaces.

The Synopsys CXL Controller IP is based on the Synopsys PCI Express controller IP which has been silicon validated in over 1800 designs with multiple hardware platforms, PHYs, and PCI Express verification suites, thereby reducing risk and accelerating time-to-market. As the industry standard for PCI Express, Synopsys offers a comprehensive IP solution in volume production and has been successfully implemented in a wide range of applications.

Synopsys Compute Express Link (CXL) Controller IP

 

Highlights
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Downloads and Documentation
  • Supports all required features of CXL 3.1 and CXL 3.0
  • Supports all key features and performance requirements in the CXL 3.0, 2.0, 1.1 and 1.0 specifications
  • Supports all required features of the PCI Express 6.2/6.1/6.0.1 (64GT/s), 5.0 (32 GT/s), 4.0 (16 GT/s), 3.1 (8 GT/s) and PIPE (32-bit) specifications
  • Application interface choices for CXL.io include the Synopsys Native PCIe interface or optional Arm® AMBA® 4 AXI and AMBA 3 AXI interface support
  • Choice of interfaces optimized for CXL.cache and CXL.mem - either the Synopsys Native CXL interface or the Arm AMBA CXS interface
  • Based on silicon-proven PCIe 6.x controller design
  • Standards-compliant Synopsys IDE Security Module protects data transfer for SoCs using the CXL 3.x and 2.0 interfaces
  • TDISP support for CXL.io for Single-Root I/O Virtualization (SR IOV) and hardware security via IDE
CXL 2.0 Premium Controller Device/Host/DM 512bSTARs Subscribe
CXL 2.0 Premium Controller Device/Host/DM 512b with AMBA bridgeSTARs Subscribe
CXL 2.0 Premium Controller Device/Host/DM 512b with AMBA bridge + LTI and MSI-GIC interfacesSTARs Subscribe
CXL 2.0 Premium Controller Device/Host/DM 512b with AMBA bridge and Advanced HPC Features (Arm CCA)STARs Subscribe
CXL 3.0 Premium Controller EP/RP/DM 1024b/512b/256b/128bSTARs Subscribe
CXL 3.0 Premium Controller EP/RP/DM 1024b/512b/256b/128b with AMBA bridge for CXL.ioSTARs Subscribe
CXL 3.0 Premium Controller EP/RP/DM 1024b/512b/256b/128b with AMBA bridge for CXL.io and LTI & MSI InterfacesSTARs Subscribe
CXL 3.0 Premium Controller EP/RP/DM/SW 128-1024 bits with AMBA bridge and Advanced HPC Features (Arm CCA)STARs Subscribe
Adds security Interfaces, features to CXL 3.0 Premium controllersSTARs Subscribe
Description: Adds security Interfaces, features to CXL 3.0 Premium controllers
Name: dwc_cxl_30_security_interface_add_on
Version: 6.22a-lca01
ECCN: 5E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Download: dw_iip_DWC_pcie_ctl_cxl
Product Code: G904-0
Description: CXL 2.0 Premium Controller Device/Host/DM 512b
Name: dwc_cxl_20_prem
Version: 6.20a
ECCN: 5E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Toolsets: Qualified Toolsets
Download: dw_iip_DWC_pcie_ctl
Product Code: F484-0
Description: CXL 2.0 Premium Controller Device/Host/DM 512b with AMBA bridge
Name: dwc_cxl_20_prem_amba
Version: 6.20a
ECCN: 5E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Toolsets: Qualified Toolsets
Download: dw_iip_DWC_pcie_ctl
Product Code: F485-0
Description: CXL 2.0 Premium Controller Device/Host/DM 512b with AMBA bridge + LTI and MSI-GIC interfaces
Name: dwc_cxl_20_prem_amba_hpc
Version: 6.20a
ECCN: 5E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Toolsets: Qualified Toolsets
Download: dw_iip_DWC_pcie_ctl
Product Code: F486-0
Description: CXL 2.0 Premium Controller Device/Host/DM 512b with AMBA bridge and Advanced HPC Features (Arm CCA)
Name: dwc_cxl_20_prem_amba_hpc_II
Version: 6.22a-lca01
ECCN: 5E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Download: dw_iip_DWC_pcie_ctl_hpc
Product Code: H474-0
Description: CXL 3.0 Premium Controller EP/RP/DM 1024b/512b/256b/128b
Name: dwc_cxl_30_prem
Version: 6.22a-lca01
ECCN: 5E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Download: dw_iip_DWC_pcie_ctl_cxl
Product Code: G901-0
Description: CXL 3.0 Premium Controller EP/RP/DM 1024b/512b/256b/128b with AMBA bridge for CXL.io
Name: dwc_cxl_30_prem_amba
Version: 6.22a-lca01
ECCN: 5E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Download: dw_iip_DWC_pcie_ctl_cxl
Product Code: G902-0
Description: CXL 3.0 Premium Controller EP/RP/DM 1024b/512b/256b/128b with AMBA bridge for CXL.io and LTI & MSI Interfaces
Name: dwc_cxl_30_prem_amba_hpc
Version: 6.22a-lca01
ECCN: 5E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Download: dw_iip_DWC_pcie_ctl_cxl
Product Code: G903-0
Description: CXL 3.0 Premium Controller EP/RP/DM/SW 128-1024 bits with AMBA bridge and Advanced HPC Features (Arm CCA)
Name: dwc_cxl_30_prem_amba_hpc_II
Version: 6.22a-lca01
ECCN: 5E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Download: dw_iip_DWC_pcie_ctl_hpc
Product Code: H475-0