DesignWare IP Prototyping Kits for PCI Express 5.0, 4.0, 3.0 and CXL 2.0
2023-08-01 17:11:23
The Synopsys IP Prototyping Kits for PCI Express 5.0, PCI Express 4.0 and PCI Express 3.0 center around a complete, out-of-the-box reference designs that consists of a validated PCIe and CXL Controller IP configurations and necessary SoC integration logic, implemented on Synopsys' HAPS® FPGA-based prototyping system. IP Prototyping Kits are available as soft deliverables requiring additional hardware prerequisites such as a HAPS system, cables, and other accessories. All IP kits include reference drivers, SoC integration logic, and application examples.
Synopsys IP Prototyping Kits for PCI Express 3.0 Controller Synopsys IP Prototyping Kits for PCI Express 4.0 Controller
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Highlights
- Supports Synopsys PCI Express 5.0, 4.0, 3.0 and CXL 2.0 Controllers
- Power management, clock and reset control block
- Pre-instrumented debug for most interfaces
- IP Prototyping Kits for PCI Express and CXL are available in the following configurations:
- Soft IP Prototyping Kits for use with your in-house HAPS system
- PCI Express 5.0 Endpoint
- PCI Express 5.0 Root Port
- PCI Express 4.0 Endpoint
- PCI Express 4.0 Root Port
- PCI Express 3.0 Endpoint
- PCI Express 3.0 Root Port
- CXL 2.0 Gen3x4 Device
- CXL 2.0 Gen3x4 Host
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