Synopsys Cloud
Cloud native EDA tools & pre-optimized hardware platforms
Request a Free Trial →
Faster TTR Closure, Higher Coverage, Shorter Regressions with VSO.ai
Synopsys VSO.ai™ (Verification Space Optimization) delivers the industry’s first AI-driven verification solution to help verification teams achieve coverage closure faster and with higher quality. The system works autonomously to reach coverage targets as quickly and as cheaply as possible with the highest quality of results. Machine learning technologies are used to identify and eliminate redundancies in regressions, automate coverage root cause analysis, and infer coverage from RTL and stimulus to identify coverage gaps and provide coverage guidance.
Experience It
Webinar
White Paper
Blog
Reducing Manual Effort and Achieving Better Chip Verification Coverage with AI and Formal Techniques
Read More
Key Benefits
Features
Seamless Integration
Synopsys VSO.ai easily integrates into existing VCS(R)-regression environments without any code changes in the design or testbench. It supports functional coverage metrics (covergroups and assertion coverage) and code coverage metrics (line, toggle, and FSM coverage). It automatically identifies and orchestrates tests to minimize a user-selected objective function such as regression CPU time, number of test runs, simulation cycles, or cycles-per-second.
Comprehensive Coverage Augmentation
Synopsys VSO.ai operates within the simulator to expertly target and improve coverage at the constraint solver, test, and test-option levels. Get ready to experience unparalleled precision and efficiency like never before!
Advanced Analytics and Diagnostics
Synopsys VSO.ai analyzes the coverage results and performs root cause analysis (RCA) to determine why specific coverage bins are not being bit.
What Our Customers Are Saying
Using AI-driven verification with Synopsys VCS, part of Synopsys.ai, we’ve achieved up to 10x improvement in reducing functional coverage holes and up to 30% increase in IP verification productivity demonstrating the ability of AI to help us address the challenges of our increasingly complex designs."
Takahiro Ikenobe
|IP Development Director, Renesas
Related AI Chip Design Tools
