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High-Speed SerDes IP Solutions

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Synopsys' comprehensive high-speed SerDes IP portfolio with leading power, performance, and area, allows designers to meet the efficient connectivity requirements of high-performance computing SoCs for hyperscale data center, networking, and storage applications.

What's New

White Paper

Why HPC Chip Designers are Looking into Linear Pluggable Optics

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PCIe 7.0? Understanding Why Now is the Time to Transition

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Achieving Seamless 1.6 Tbps Interoperability for High BW HPC AI/ML SoCs

How Synopsys 224G IP is Enabling the Future of 1.6T Networking and UALink 200G

With 40+ customer implementations in high-speed PAM4 technologies, Synopsys leads in 224G Ethernet IP, enabling the fastest chips. Learn about silicon-proven solutions, customer adoption benefits, and our detailed characterization report. Watch now!

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How Synopsys 224G IP is Enabling the Future of 1.6T Networking and UALink 200G

Resources

Synopsys Shows PCIe 7.0 and 224G over Linear Pluggable Optics

See our 224G Ethernet PHY IP and PCIe 7.0 demonstrate excellent performance through linear pluggable optics. Linear drive optics signify potential power savings, critical for next-gen HPC chips.

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Synopsys Shows PCIe 7.0 and 224G over Linear Pluggable Optics

224G and 112G Ethernet PHY IP enable 800Gbps and beyond at DesignCon 2024

Watch a variety of Ethernet IP demos at DesignCon 2024, including the world's first 224G asynchronous true-long reach demo equalizing 40+dB of insertion loss! You can also see 224G, 112G and 800G Ethernet interop demos showing robust performance.

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224G and 112G Ethernet PHY IP enable 800Gbps and beyond at DesignCon 2024

Successful 224G Ethernet PHY IP Interop with backplane channels at TSMC Symposium 2023

At TSMC Symposium 2023 we showcased a successful 224G Ethernet PHY IP interop demonstration with backplane channels. Watch the various plots, ADC histogram and excellent eye diagrams results.

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Successful 224G Ethernet PHY IP Interop with backplane channels at TSMC Symposium 2023

Synopsys 224G IP Shows Ecosystem Interops for 1.6Tbps AI Networks at DesignCon 2025

Watch Synopsys 224G IP, the most interoperated 224G IP in the world, perform at DesignCon '25, featuring LR channels like Flyover and 1m-DAC, and VSR channels. Learn how our IP enables scale-up/out connectivity for AI clusters and networking.

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Synopsys 224G IP Shows Ecosystem Interops for 1.6Tbps AI Networks at DesignCon 2025

Synopsys 800G MAC, PCS and PHY IP Interop with Switches and Optical Links at ECOC '24

See our 800G Ethernet subsystem with 8 lanes of 112G, MAC and PCS in Frankfurt, our demonstrate 800Gbps Ethernet traffic via optical links and Juniper switches, achieving zero BER over a 3m DAC and zero post FEC errors.

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Synopsys 800G MAC, PCS and PHY IP Interop with Switches and Optical Links at ECOC '24

Synopsys 224G IP Solution Shows Widest Multi-Vendor Interop at ECOC 2024

See our 224G Ethernet PHY IP demonstrate excellent performance through a variety of channels and vendors, including VSR and LR, including ISI, mated MCB/HCB, and DAC/ACC. Our 224G PHY IP is an integral part of the complete 1.6T Ethernet IP solution.

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Synopsys 224G IP Solution Shows Widest Multi-Vendor Interop at ECOC 2024

Synopsys Shows PCIe 7.0 and 224G over Linear Pluggable Optics

See our 224G Ethernet PHY IP and PCIe 7.0 demonstrate excellent performance through linear pluggable optics. Linear drive optics signify potential power savings, critical for next-gen HPC chips.

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Synopsys Shows PCIe 7.0 and 224G over Linear Pluggable Optics

224G and 112G Ethernet PHY IP enable 800Gbps and beyond at DesignCon 2024

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224G and 112G Ethernet PHY IP enable 800Gbps and beyond at DesignCon 2024

Successful 224G Ethernet PHY IP Interop with backplane channels at TSMC Symposium 2023

At TSMC Symposium 2023 we showcased a successful 224G Ethernet PHY IP interop demonstration with backplane channels. Watch the various plots, ADC histogram and excellent eye diagrams results.

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Successful 224G Ethernet PHY IP Interop with backplane channels at TSMC Symposium 2023

Synopsys 224G IP Shows Ecosystem Interops for 1.6Tbps AI Networks at DesignCon 2025

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Synopsys 224G IP Shows Ecosystem Interops for 1.6Tbps AI Networks at DesignCon 2025

Synopsys 800G MAC, PCS and PHY IP Interop with Switches and Optical Links at ECOC '24

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Synopsys 800G MAC, PCS and PHY IP Interop with Switches and Optical Links at ECOC '24

Synopsys 224G IP Solution Shows Widest Multi-Vendor Interop at ECOC 2024

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Synopsys 224G IP Solution Shows Widest Multi-Vendor Interop at ECOC 2024

Synopsys Shows PCIe 7.0 and 224G over Linear Pluggable Optics

See our 224G Ethernet PHY IP and PCIe 7.0 demonstrate excellent performance through linear pluggable optics. Linear drive optics signify potential power savings, critical for next-gen HPC chips.

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Synopsys Shows PCIe 7.0 and 224G over Linear Pluggable Optics

224G and 112G Ethernet PHY IP enable 800Gbps and beyond at DesignCon 2024

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224G and 112G Ethernet PHY IP enable 800Gbps and beyond at DesignCon 2024

Successful 224G Ethernet PHY IP Interop with backplane channels at TSMC Symposium 2023

At TSMC Symposium 2023 we showcased a successful 224G Ethernet PHY IP interop demonstration with backplane channels. Watch the various plots, ADC histogram and excellent eye diagrams results.

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High-Speed SerDes IP Solutions

What's New

Why HPC Chip Designers are Looking into Linear Pluggable Optics

PCIe 7.0? Understanding Why Now is the Time to Transition

Achieving Seamless 1.6 Tbps Interoperability for High BW HPC AI/ML SoCs

How Synopsys 224G IP is Enabling the Future of 1.6T Networking and UALink 200G

Resources

Synopsys Shows PCIe 7.0 and 224G over Linear Pluggable Optics

224G and 112G Ethernet PHY IP enable 800Gbps and beyond at DesignCon 2024

Successful 224G Ethernet PHY IP Interop with backplane channels at TSMC Symposium 2023

Synopsys 224G IP Shows Ecosystem Interops for 1.6Tbps AI Networks at DesignCon 2025

Synopsys 800G MAC, PCS and PHY IP Interop with Switches and Optical Links at ECOC '24

Synopsys 224G IP Solution Shows Widest Multi-Vendor Interop at ECOC 2024

Synopsys Shows PCIe 7.0 and 224G over Linear Pluggable Optics

224G and 112G Ethernet PHY IP enable 800Gbps and beyond at DesignCon 2024

Successful 224G Ethernet PHY IP Interop with backplane channels at TSMC Symposium 2023

Synopsys 224G IP Shows Ecosystem Interops for 1.6Tbps AI Networks at DesignCon 2025

Synopsys 800G MAC, PCS and PHY IP Interop with Switches and Optical Links at ECOC '24

Synopsys 224G IP Solution Shows Widest Multi-Vendor Interop at ECOC 2024

Synopsys Shows PCIe 7.0 and 224G over Linear Pluggable Optics

224G and 112G Ethernet PHY IP enable 800Gbps and beyond at DesignCon 2024

Successful 224G Ethernet PHY IP Interop with backplane channels at TSMC Symposium 2023

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