How Synopsys IP and TSMC’s N12e Process are Driving AIoT

Artificial intelligence (AI) is revolutionizing nearly every aspect of our lives in all industries, driving the transformation of technology from development to consumption and reshaping how we work, communicate, and interact. On the other hand, the Internet of Things (IoT) connects everyday objects to the internet, enabling a network of interconnected devices that adds additional improved efficiency and enhanced convenience in our lives.

The union of AI and IoT, known as AIoT, integrates AI capabilities into IoT devices and is further poised to change our lives and drive the semiconductor industry's expansion in the foreseeable future. AIoT devices can analyze and interpret data in real-time, enabling smart decisions, autonomously adapting to observed conditions. Promising heightened intelligence, connectivity, and device interactivity, AIoT is capable of handling vast data volumes without needing to rely on cloud-based processing methods.

Within AIoT devices, AI seamlessly integrates into infrastructure components, including programs and chipsets, all interconnected via IoT networks. From smart cities to smart homes and industrial automation, AIoT applications require real-time data processing that is powered by high-capacity on-chip memories, compute power, and minimal power consumption.

Read on to learn more about the opportunities and challenges of AIoT applications at the edge as well as Synopsys IP on TSMC’s N12e process and how it supports pervasive AI at the edge.

AIoT Applications at the Edge

AI is truly everywhere and can be found in data centers, cars, and high-end compute devices. However, processing data at or close to the source of information complements the cloud-based AI approach and allows for the immediate processing of data and speedy results for optimal service, more personalized functions to the user, protection of information/additional privacy, and additional reliability.

Everything from smartwatches, security cameras, smart fridges, automation-enabled factory machinery, smart traffic lights, and more are considered AIoT devices. Each of these devices is unique in some way which requires chip designers to find the right balance between performance, power usage, and cost.

TSMC N12e Process & AIoT

The semiconductor industry has considered 16nm and 12nm “long nodes” (or nodes that will be around for many, many years to come) for consumer, IoT, wireless, and certain automotive applications. These nodes can leverage AI because they have great performance using the FinFet process but are also cost-effective and low power. 

TSMC has made investments to boost performance and power in these nodes, making them even more appealing for power-conscious designs. For example, N12e offers a device boost for higher density with good performance/power tradeoffs and ultra-low leakage static random access memory (SRAMs). 

Not only does this provide approximately 15% power savings and the memory required to process all that data at the edge, but it is also compatible with existing design rules to minimize IP investment. That’s where Synopsys comes in. 

Synopsys IP reduces leakage even further through a variety of different techniques:

• Power Gating: This technique can be used from an active state or a disabled or “turned-off state.” An active state requires retention/restoring such that it is possible to save the state the IP is currently at once power gating is exited. To use this mode, circuits such as always-on domain retention and power control logic are required. Entering power gating from a disabled state requires IP that supports power collapsing and needs to be restarted after power gating is exited.
• Voltage Scaling: IP is also available to scale the voltage down in order to reduce the leakage consumption. There are two types of voltage scaling — dynamic voltage and frequency scaling. With frequency scaling, IP is still performing functional activities but the voltage is reduced in order to meet timing requirements. 
• Retention: In this technique, voltage is reduced to a level where registers still hold their current value but it is expected that the IP is not performing functional activity. This means that there is no toggling, IDLE mode, or setup/hold sign-off.

The IP used to design AIoT chips must be versatile in order to support the many different use cases and applications that are powered by N12e process and other low power nodes.  Higher-performance chips require a more sophisticated low-power strategy using the various techniques described above.

As AIoT devices become even more prevalent in our homes, workplaces, and cities, Synopsys and TSMC will continue to develop even more sophisticated high-performance, low-power solutions to fuel further innovation in this space.