Nov 20, 2024/2 min read World's First CXL 3.1 Multi-Vendor Interoperability Demo Showcases New Memory Possibilities for Hyperscale Data Centers By Gary Ruggles, Gordon Getty Tags: Synopsys IP Technical Bulletin, Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP
Apr 16, 2024/7 min read Enabling the Integration of ADAS and IVI SoCs with Automotive-Grade IP By Ron DiGiuseppe Tags: Synopsys IP Technical Bulletin, General IP, Automotive, Silicon IP