Transistor Architectures for 5-nm Node and Beyond

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Increasing the fin-height in FinFET devices helps designers meet aggressive area shrink goals – in concert with fin depopulation – but comes with added complications in increased parasitics and greater manufacturing challenges. Synopsys has long been working across the industry to research, enable and thus chart a path for what transistor architectures will look like beyond the FinFET. In this video, Synopsys R&D will discuss the most likely options for transistor architectures as we move beyond the 5-nm node and how this is demanding a broader solution of “variability-driven engineering”.

Transcript:

So we're going to talk about 5 nanometer and beyond technology, and we're going to look at a simple structure of a cell-like inverter.

• Here, you have the power rail and ground rail implemented with metal zero, also horizontally placed fins.
• Source drain configurations are set, with gates indicated in blue. The real device is in the center, and the dummy devices are at the edges of the cell.

One thing you see here is the channel legs. When you have certain fin lengths, the bias from the drain tries to reach the source. You design it such that it doesn't reach the source, ensuring the transistor works fine and can be turned off.

Shrinking Sizes and Challenges

• In 5 nanometer technology, you shrink sizes, bringing the source closer to the drain.
• Keeping the fin lengths the same can cause the drain field to reach the source, leading to an open transistor and leakage issues.

Cross-Section and Next Technology

• This is a cross-section of the fin in the channel, showing the fin cross-section and channel.
• In technologies like 3 nanometer or 4 nanometer, you make the fin narrower to avoid short channel effects while maintaining switchability.

Solutions: Thin Fins and Nanowires

• One option is to make the fin thin, keeping it mechanically stable and consistent.
• Another option is to create nanowires, stacking them instead of having one narrow tall fin. However, nanowires face challenges with random dopants or charged particles blocking the channel due to the small cross-section.

Nanowires vs. Nanosheets

• Instead of nanowires, consider stretching them laterally to form nanosheets or nanoslabs with a larger cross-section.
• This approach allows electrons to avoid blocked areas, ensuring better performance.

Performance and Variability Considerations

• The decision between thin fins, nanowires, or nanosheets depends on performance, parasitic capacitance, resistance, and variability.
• Nanowires, despite good electrostatics and on-off behavior, might not be favored due to variability issues.
• FinFETs' variability is influenced by lithography, while nanosheets benefit from epitaxial growth for layer consistency, potentially making them a better choice.

These are the considerations for technology at 5 nanometers and beyond.