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It should come as no surprise that chip designers focused on mission-critical IC applications such as automotive, medical, aerospace, and defense need tools that are tuned in to a higher level of safety requirements (e.g., industry standards such as IDO 26262) and long-term reliability under harsh conditions. Additionally, designers must comply with low defect rates (measured in defective parts per billion or DPPB), not to mention the latest system-on-chip (SoC) and system-in-package (SIP) designs that make analysis even more complex.
That’s why Synopsys introduced PrimeSim™ Reliability Analysis this month, an integrated part of Synopsys PrimeSim Continuum that was announced earlier this year. The comprehensive PrimeSim Reliability Analysis solution unifies production-proven and foundry-certified reliability analysis technologies covering electromigration/IR drop analysis, high-sigma Monte Carlo, MOS aging, analog fault simulation, and circuit checks (ERC) to enable full-lifecycle reliability verification.
Electronic Design, SemiWiki, SemiconductorEngineering, Electronics Weekly and eeNews Europe were among the many industry publications that recognized this important new tool to accelerate hyper-convergent designs for mission-critical applications.
Unified Full Chip Lifecycle Reliability Verification
It’s not uncommon for advanced chips used in vehicles and medical devices to contain billions of transistors. That makes it impossible for chip engineers to verify every detail manually before the final chip is manufactured. But if weaknesses in the design are not found early enough, the development process lengthens, ballooning engineering costs and increasing the risk of premature failure.
“In the old days variability analysis was addressed with brute-force Monte Carlo analysis, but today we don’t have enough time to run a billion simulations, so by applying ML to Monte Carlo analysis we find a smarter way to get the same high-sigma coverage desired as brute force with orders of magnitude fewer Monte Carlo simulations,” said Daniel Payne, SemiWiki.
The need to verify safety and reliability on hyper-converged designs throughout the full lifecycle of the chip requires a holistic and cohesive approach to reliability verification.
As previously mentioned, PrimeSim Reliability Analysis is integrated with PrimeSim Continuum to allow users to seamlessly deploy foundry-certified reliability analysis technologies and industry-leading simulation engines, and verify reliability across early life, normal life, and end-of-life stages.
“By testing reliability early in development, PrimeSim Reliability Analysis helps diagnose defects and reduce late-stage changes. It can also save customers from over-engineering their chips to make sure they can tolerate harsh conditions,” said James Morra, ElectronicDesign.
Running a Wide Variety of Simulations
PrimeSim Continuum runs PrimeSim XA, PrimeSim SPICE, PrimeSim Pro (FastSPICE), and PrimeSim HSPICE simulation engines to model various parts of the chip’s design to test for faults that can lead to failures post-production and identify areas that need improvement.
Synopsys PrimeWave™ technology comes into play to set up and visualize these simulations, essentially serving as a central dashboard for engineers to play out “what-if” scenarios. This newly architected environment delivers a rich and consistent reliability verification experience across all PrimeSim Continuum engines and PrimeSim Reliability Analysis technologies with unified setup and results post-processing.
All these technologies are cloud-ready with optimization for leading public cloud platforms and containerized environments. PrimeSim is also certified with leading foundries such as TSMC and Samsung Foundry on advanced nodes, including 7nm and 5nm.
PrimeSim Reliability Use Cases
Several leading semiconductor companies have already adopted the new PrimeSim Reliability Analysis solution, including Dialog Semiconductor, TDK-Micronas, STMicroelectronics, and AMD for a variety of different applications.
Dialog Semi is using PrimeSim CCK for analog IPs; AMD is using PrimeSim HSPICE with AVA for high-sigma analysis; STMicroelectronics is using EMIR analysis for analog IPs, as well as MOSRA and AVA; and finally, TDK-Micronas is utilizing Custom Fault for IP-level FMEDA analysis and ISO 26262 compliance.
“Automotive ICs govern the operation of a plethora of mission-critical functions such as advanced driver assistance systems (ADAS), braking and steering and, therefore, require systematic FMEDA [failure modes, effects and diagnostic analysis] analysis to ensure high levels of functional safety,” said Dr. Mario Anton, vice president of R&D at TDK-Micronas GmbH in a recent news release. “The analog fault simulation technology of PrimeSim Reliability Analysis solution offers high-performance, customizable fault models and an open fault database, enabling our designers to easily calculate IP-level FMEDA metrics and verify ISO 26262 compliance on our automotive ICs.”
By providing cohesive reliability verification across early, normal, and end-of-life scenarios, the PrimeSim Reliability Analysis solution addresses a variety of industries’ needs to produce safe and trusted hyper-converged designs. Learn more about PrimSim Reliability Analysis →