Keysight Validates PCIe 6.0 Specification's Speed

Meeting the Need for Speed with PCIe 6.0

SSDs are an early integrator of PCIe v6.0 technology. The bandwidth requirement for SSD SoCs is quite high because these devices interface with both non-volatile memory express (NVMe) and Flash memory as well as root complex processors. While their storage capacity has increased thanks to technology advances like stacked die, SSDs are limited by the bandwidth of the SSD socket, which is in turn gated by the PCIe data rate. The increase to 64 GT/s provided by PCIe v6.0 devices promises to be a boon for SSD SoCs, enabling them to take full advantage of increases in storage capacity.

Overall, PCIe v6.0 technology provides an answer to the bandwidth limitations that compute-intensive SoCs are continually up against. In addition to the faster data transfer rate, the newest specification provides:

• Power efficiency via a new low-power state
• Cost-effective performance
• Backwards compatibility with previous PCIe generations

The PCIe v6.0 standard is the first version of PCIe technology to use pulse amplitude modulation 4-level (PAM4) signal encoding. PAM4 enables PCIe v6.0 devices to deliver double the throughput of the preceding PCIe spec version with the same channel bandwidth as well as low power and backwards compatibility.

For Synopsys and Keysight, the process of establishing the linkup at L0 involved sending data packets first at a slow speed and negotiating up to the higher speed across the serial link, exchanging equalization information along the way. The links are quite sensitive—even a bumped wire can trigger a trip to recovery and renegotiations. Keysight’s comprehensive portfolio of PCIe testing solutions includes a protocol analyzer that examines traffic moving across the link and an exerciser at the end point for compliance and stress testing. The end-to-end hardware linkup was completed with the Synopsys HAPS®-100 prototyping system, which was connected to a 64G PHY daughtercard connected to a controller to form the complete system.

The PCIe v6.0 specification is complex, with close to 2,000 pages comprehending the BASE spec. When a vendor can demonstrate that it is following the specification correctly, and do so with a third party, this provides confidence of successful interoperability. Synopsys had previously achieved the 64 GT/s linkup with the company’s own hardware. Achieving a rigorous demonstration of a two-party linkup with Keysight, a longtime collaborator, not only validates the interoperability, but this achievement, along with the data transfer rate, is key to enabling applications like data center virtualization and allowing for better utilization of data center resources.