Collaborate to Accelerate Innovation for Next-Generation Designs

TSMC, a leading semiconductor foundry, and Synopsys have joined forces to deliver optimized solutions for mutual customers across TSMC's wide range of process technologies. This collaboration offers designers access to the most comprehensive IP, EDA tools, and multi-die system design flow and Photonic IC design flows, all designed to work seamlessly with TSMC's advanced process technologies. With support for TSMC’s FinFET technology, Nanosheet technology, COUPE technology, 3DFabric™ technologies, and the 3Dblox technology, this partnership provides designers with the tools and IPs to create cutting-edge designs that push the boundaries of what's possible.

Key Benefits

Areas of Collaboration

<p>With the evolution of process technologies, TSMC and Synopsys have anticipated the design challenges for each new process technology generation and have identified new design implementation issues. To help designers work within increasing technical constraints and stricter product requirements, we are continuously working towards tool certification and technology for the latest nodes. We collaborate in advanced FinFET technology, enhanced <a href="/content/synopsys/en-us/implementation-and-signoff/signoff.html">timing and statistical design</a>, <a href="/content/synopsys/en-us/implementation-and-signoff/3dic-design.html">3DIC design</a> using <a href="https://3dfabric.tsmc.com/english/dedicatedFoundry/technology/3DFabric.htm">3DFabric™</a>, <a href="/content/synopsys/en-us/implementation-and-signoff/ams-simulation.html">analog mixed signal</a>, and <a href="/content/synopsys/en-us/implementation-and-signoff/custom-design-platform.html">custom design</a>.</p>

Seamless Design Flows and Certified Design Tools

As process technologies evolve, TSMC and Synopsys have been proactive in anticipating design challenges that come with each new generation. We have identified new design issues and are working tirelessly to help designers navigate the increasing technical constraints and stricter production requirements. We are continuously working toward tool certification and technology for the latest nodes. Among the newest collaborations are the co-optimized Photonic IC flow and multi-die design flow, which aim to improve power, performance, transistor density and time to production, ultimately enhancing system performance. By staying ahead of the curve and working together, TSMC and Synopsys are leading the charge in advancing process technologies and revolutionizing the semiconductor industry.

<p>For more than 20 years, Synopsys and TSMC have collaborated to deliver a high-quality Interface IP and Foundation IP portfolio for TSMC’s process technologies from 180-nm to 3-nm, targeting a range of applications including HPC, AI, automotive, and mobile. With the high-quality IP portfolio, designers can align their aggressive project schedule and design requirements, while optimizing PPA, bandwidth and latency. To meet the stringent reliability and operation requirements of ADAS SoCs, leading automotive OEMs, Tier 1s, and semiconductor providers have adopted Synopsys’ automotive-grade IP for TSMC processes. With the broad adoption of DesignWare IP and customer silicon successes, Synopsys enables designers to integrate the IP with confidence and significantly lower SoC integration risk.</p>

Silicon-Proven IP for TSMC Processes

For more than 20 years, Synopsys and TSMC have collaborated to deliver a high-quality Interface IP and Foundation IP portfolio for TSMC’s process technologies from 180-nm to 2-nm, targeting a range of applications including HPC, AI, automotive, and mobile. With the high-quality IP portfolio, designers can align their aggressive project schedule and design requirements, while optimizing PPA, bandwidth and latency. To meet the stringent reliability and operation requirements of ADAS SoCs, leading automotive OEMs, Tier 1s, and semiconductor providers have adopted Synopsys’ automotive-grade IP for TSMC processes. With the broad adoption of DesignWare IP and customer silicon successes, Synopsys enables designers to integrate the IP with confidence and significantly lower SoC integration risk.

<p>Synopsys design solutions are certified for TSMC’s Open Innovation Platform Virtual Design Environment (VDE) to run on Amazon Cloud (AWS), Microsoft Azure, and Google Cloud Platform (GCP). The combination of these industry-leading cloud platforms and Synopsys <a href="/content/synopsys/en-us/cloud/silicon-design.html">design tools for the cloud</a> enable system-on-chip (SoC) designs with easy hardware scaling to boost design implementation and signoff productivity. </p>

Cloud Solutions and OIP Virtual Design Environment

Synopsys design solutions are certified for TSMC’s Open Innovation Platform Virtual Design Environment (VDE) to run on Amazon Cloud (AWS), Microsoft Azure, and Google Cloud Platform (GCP). The combination of these industry-leading cloud platforms and Synopsys design tools for the cloud enable system-on-chip (SoC) designs with easy hardware scaling to boost design implementation and signoff productivity. 

Testimonials

Achieving high quality-of-results and faster time to market for advanced SoC designs are the cornerstone of the long-standing collaboration between TSMC and Synopsys. Collaborating closely with our Open Innovation Platform® (OIP) design ecosystem partners like Synopsys is vital to enable our mutual customers with certified flows and high-quality IP that are essential to meet or exceed their design targets on TSMC’s advanced processes.

Lipen Yuan

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Senior Director of Advanced Technology Business Development at TSMC

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