IBM Research and Synopsys Study on Properties of Alternative Metals for Advanced Logic Interconnects

Scaling of logic technologies to the 3nm node and beyond motivates the evaluation of new metals for the power rails and signal wires to mitigate the rising impact of interconnect parasitics on performance. The current solution based on copper and a barrier metal exhibits a significant rise in resistivity as conductor widths decrease, which leads to lower performance and higher IR drop. To support the exploration and eventual integration of alternative metals, Synopsys and IBM Research jointly performed QuantumATK atomic-scale [1,2] and TCAD Raphael FX simulations of new-generation metals (Ru, Co, W) as part of the IBM and Synopsys collaboration on accelerating post-FinFET process development with Design Technology Co-Optimization (DTCO) innovations.

The study describes a methodology for carrying out the QuantumATK simulations to account for the effects of grain boundary and surface scattering and suggests that the fcc phase of Ru could be a superior alternate conductor to Cu due to lower line and via resistance.

Complete workflow for systematic screening of new interconnect metals

As highlighted in our previous overview of the application of QuantumATK to the study of scaling of interconnect stacks, a metal is encapsulated by a structure comprised of adhesion liners, wetting and diffusion barrier layers (which improve electromigration and prevent the metal from diffusing into the adjacent dielectric) as shown in Figure 1. Thus, when comparing alternative metals with copper, it is important to go beyond a simple comparison of bulk metal resistivity values, and instead account for the presence of liner and materials (Cu > Co > Ru) and their susceptibility to surface degradation. In the case of vias, the presence of liners and barriers also impacts vertical via resistance. As shown in the joint IBM Research and Synopsys papers [1,2], QuantumATK offers a complete and systematic workflow for characterizing and screening new interconnect metals, that is of paramount importance in identifying pathways to reduce various sources of resistance, such as grain boundary and surface scattering. The results and insights derived from the simulations enable technologists to more efficiently select and integrate alternative metals into advanced logic and memory processes. 

The study [1] finds that the formation energy of the fcc phase of Ru, that is observed in confined structures and possibly present in tight-pitched interconnects lines, is only 0.1 eV/atom less stable than the dominant and previously investigated hcp phase of Ru [3]. Phonon-limited bulk resistivity including grain boundary scattering is much lower for the Ru fcc phase than for the hcp phase, although it is still higher than the Cu fcc phase in the current interconnect technology, as shown in Figure 1 [1,2]. However, when considering the combined effect of conductor and liner/barriers, the study reveals that the fcc Ru lines can offer lower line resistance below 21 nm line width compared to Cu fcc, due to the lower conductor volume lost to surrounding layers resulting from a better performance of thin adhesion liners, as shown in Figure 1. In conclusion, the study suggests that the fcc phase of Ru could be a superior alternate conductor to Cu due to lower line and via resistance.

Efficient computational methods for studying interconnects

QuantumATK computes the electron transport and resistivity of metals using rigorous density functional theory (DFT) and non-equilibrium Green’s function (NEGF) methods. This methodology is used to obtain i) phonon-limited resistivity and electron mean free path for bulk metals through the mobility analysis object, ii) metal line resistance as a function of a line width, and iii) vertical resistance in vias, i.e., interfaces between various conductor, adhesion liners, wetting and diffusion layers. QuantumATK is the most accurate and feature leading electron transport code for properly studying interfaces between materials using a two-probe methodology instead of slab or periodic approximations.

DFT+NEGF is used to evaluate resistance due to scattering at grain boundaries (GB), and to extract grain boundary reflection coefficients. Grain boundary scattering simulations are facilitated by Sentaurus Materials Workbench (SMW) which automates key tasks such as easily building and relaxing a large set of GBs, calculating GB reflection coefficients and GB resistivity for different average grain sizes. A QuantumATK study on grain boundary scattering in Ru and Cu interconnects [2] shows that it is very important to consider a sufficiently large set of grain boundaries. The study found twice as large reflection coefficient for Cu by considering a larger set of GBs than previously reported. GB reflection coefficients, phonon limited mobility and electron mean free path are extracted with SMW Interconnect and QuantumATK and then used as input parameters to Raphael FX simulations to study effects of GBs on metal resistivity, as illustrated in Figure 2. Raphael FX is a field solver that extracts interconnect resistance and capacitance of complex process structures, and is used by technology development teams to assess, early on, the RC parasitic impact of new processes for the middle-of-line (MOL) and back-end-of-line (BEOL) interconnects. Raphael FX takes the structure created by Process Explorer, a 3D process emulator that builds an accurate 3D process structure from mask and process recipe inputs, and using parameters from SMW Interconnect extracts the resistance of the metal lines with GBs.  

The QuantumATK-to-Raphael FX workflow automated in SMW provides technology development and TCAD teams working in advanced logic processes with a systematic methodology for evaluating the performance impact of alternative metals, thereby identifying promising pathways for experimental validation and process integration.

Relevant resources

DFT-NEGF simulations with QuantumATK

• Introduction to NEGF
• NEGF convergence guide
• Webinar on simulation of device I-V electrical characteristics
• Webinar on structural relaxation of devices and interfaces
• Webinar on simulating interfaces in electronics

Phonon-limited mobility

• Webinar on simulating phonon-limited mobility electron mobility of materials
• Tutorial on calculating phonon-limited mobility

Grain boundary simulations with Sentaurus Materials Workbench

QuantumATK reference paper is now available

Check out our recently published reference paper “QuantumATK: an integrated platform of electronic and atomic-scale modelling tools”  [1]  which gives  a general overview of the entire QuantumATK platform.

[1] S. Smidstrup, T. Markussen, P. Vancraeyveld, J. Wellendorf, J. Schneider, T. Gunst, B. Vershichel, D. Stradi, P. A. Khomyakov, U. G. Vej-Hansen, M.-E. Lee, S. T. Chill, F. Rasmussen, G. Penazzi, F. Corsetti, A. Ojanpera, K. Jensen, M. L. N. Palsgaard, U. Martinez, A. Blom, M. Brandbyge, and K. Stokbro, “QuantumATK: An integrated platform of electronic and atomic-scale modelling tools”, J. Phys.: Condens. Matter 32, 015901 (2020). arXiv: 1905.02794v2.

References

[1] T. M. Philip, N. A. Lanzillo, T. Gunst, T. Markussen, J. Cobb, S. Aboud, and R. R. Robison, “First principles evaluation of fcc ruthenium for its use in advanced interconnects”, Phys. Rev. Appl. 13, 044045 (2020)   arXiv: 2001.02216v3

[2] T. Markussen. T. Gunst, S. Aboud, J. Cobb, A. Blom, T. M. Philip, N. A. Lanzillo, R. R. Robison, “Grain boundary scattering in Ru and Cu interconnects”, Paper submitted to the International Interconnect Technology Conference, IITC 2020.

[3] H. Dixit, J. Cho and F. Benistant, “First-principles evaluation of resistance contributions in Ruthenium interconnects for advanced technology nodes”, SISPAD 2018. 

[4] N. A. Lanzillo, B. D. Briggs, R. R. Robison, T. Standaert, C. Lavoie, “Electron transport across Cu/Ta(O)/Ru(O)/Cu interfaces in advanced vertical interconnects”, Comp. Mat. Sci. 158, 398 (2019).

[5] N. A. Lanzillo, O. D. Restrepo, P. S. Bhosale. E. Cruz-Silva, C.-C. Yang, B. Y. Kim, T. Spooner. T. Standaert, C. Child, G.Bonilla. and K. V. R. M. Murali, “Electron scattering at interfaces in nano-scale vertical interconnects: A combined experimental and ab initio study”, App. Phys. Lett. 112, 163107 (2018).