Cloud native EDA tools & pre-optimized hardware platforms
By Neil Mullinger, Product Marketing Manager, Verification IP, Synopsys
There have been some exciting changes to Synopsys’ Verification IP portfolio in the last few months. We introduced Discovery Verification IP (VIP), our next-generation verification IP product line based on the 100% SystemVerilog VIPER architecture with many new features and up to 4X higher performance of other VIP solutions. In addition, we announced the availability of verification IP for Non-Volatile Memory (NVM) Express and acquired two leading verification IP companies including nSys Design Systems and Expert IO.
The Portfolio of Synopsys verification IP can be viewed at: https://www.synopsys.com/Tools/Verification/FunctionalVerification/VerificationIP/Pages/default.aspx
The news release for Discovery VIP can be viewed at: http://synopsys.mediaroom.com/index.php?s=43&item=1004
Synopsys has now modified the support structure and delivery method of our Verification IP portfolio. The Verification IP will now use the standard Synopsys delivery method. The verification IP .run files can be downloaded from this new location: https://solvnet.synopsys.com/DownloadCenter/dc/product.jsp
Note: Once you have download the *.run file, the installation process remains the same. Simply set up your environment as documented and execute the *.run file. You must have a SolvNet account to access the download page.
As part of this change, the Verification IP will no longer be available for download from the myDesignWare as of Jun 30th 2012.