How PrimeSim Continuum is Transforming SoC Design: Insights from Hany Elhak

Q: What is PrimeSim Continuum?

Hany Elhak: The PrimeSim Continuum solution is a unified workflow of best-in-class circuit simulation technologies. It includes the world’s fastest, GPU-accelerated signoff SPICE, 10X faster than the fastest simulator running on CPU only. It also includes next-generation FastSPICE architecture that is 5X faster and 2X more capacity than our leading FastSPICE simulator.  

PrimeWave™ is a newly architected design environment that delivers a seamless simulation experience around all PrimeSim engines with comprehensive analysis, improved productivity and ease of use.

Q: What has changed in the design landscape that drove the need for PrimeSim Continuum?

Hany Elhak:  Today’s hyper-convergent SoCs consist of larger and faster embedded memories, analog front-end devices and complex I/O circuits that communicate at 100Gb+ data rates. The design complexity increases further as stacks of DRAM chips connect to the SoC in a system-in-package design. Such complex systems cannot be verified using point tool simulators integrated in home-grown ad-hoc flows. The systemic complexity is driving the need for converged workflows around a common circuit simulation solution.

Scale is another level of complexity. We have larger, more complex circuits running at higher frequencies. These circuits are designed at advanced process nodes with higher parasitics and lower noise margins and increased variability. This results in more simulations with longer runtimes at higher accuracy requirements, impacting the overall time-to-results (TTR), quality-of-results (QoR) and cost-of-results (CoR).

Q: How does PrimeSim Continuum address this systemic complexity?

Hany Elhak: PrimeSim Continuum addresses the systemic complexity of such hyper-convergent designs with a unified workflow of signoff quality simulation engines tuned for analog, mixed-signal, RF, custom digital memory designs.

• PrimeSim HSPICE simulator is the golden reference for device modeling, foundation IP and signal integrity
• PrimeSim SPICE simulator offers superior runtime performance and signoff accuracy for analog, mixed-signal and RF designs
• PrimeSim Pro simulator delivers leading runtime performance and capacity for discrete DRAM and FLASH memory designs
• PrimeSim XA simulator is the leading FastSPICE simulator for embedded memory and mixed-signal SoC verification

This solution brings together these best-in-class SPICE and FastSPICE technologies, the best time and frequency domain simulation, comprehensive analysis including noise and reliability, all in a unified workflow with common input/output, device models, analysis setup, and result post-processing.

Q: What is new about a unified workflow?

Hany Elhak: The answer to your question is scale complexity. Most EDA vendors have promised similar ideas of platforms and unified workflows. But as circuits become bigger and more complex, compromises are made and the solutions diverge. I have been in this industry for over twenty years. I have heard excuses such as, “I need different parsers because I add heuristics to my FastSPICE parser to speed it up for very large circuits. These heuristics will compromise the accuracy of my SPICE parser if used”. Also, a unified workflow needs to have best-in-class engines that are tuned for every design type and verification discipline. A workflow of sub-par engines is not a continuum.

Q. How does PrimeSim Continuum address the scale complexity without diverging?

Hany Elhak: We address the scale complexity by continuously improving the performance and capacity of the simulation engines to always be ahead of the increasing size and complexity of the circuits to be solved. The solution is improving the solved mathematics and utilizing the modern hardware resources such as CPU scaling and GPU acceleration instead of approximating the circuits.

The PrimeSim Continuum solution consists of the PrimeSim SPICE simulator, which delivers on average 3X better runtime than the competition on the same number of CPUs based on customer benchmarks. On top of this 3X advantage, PrimeSim SPICE has a next generation, CPU-GPU hybrid architecture that delivers 10X better performance that simulations running on CPU alone.

It also consists of a next-generation FastSPICE architecture that delivers 5X better runtime performance and 2X better capacity enabling the simulation of circuits unsolvable today.

Q. We know that GPUs are designed for graphics and now for machine learning applications. How does circuit simulation benefit from the GPU?

Hany Elhak: Another important GPU application is mining of digital currency. Going back to circuit simulation, we have found that circuit complexity can be defined as the number of corners multiplied by the number of elements in the circuit increases exponentially over the years driven by scale complexity. In the past, on top of the incremental enhancements to SPICE technology, circuit designers benefited from a 1.5X yearly improvement in CPU computing performance. Today, this performance is saturating at 1.1X. On the other hand, GPU computing performance continues to grow at 1.5X per year. It is expected that GPU computing performance will exceed that of CPU by 1000X in 2025. Also, GPUs now contain double precision cores and larger memories which are essential for circuit simulation. So it made perfect sense for us to port the SPICE technology to the GPU.

We introduced a next-generation SPICE architecture that utilizes heterogenous compute acceleration on CPU and GPU. SPICE consists of two main steps: device evaluation and matrix solving. We optimized both for the GPU and developed a GPU-friendly data structure to improve bandwidth and latency as data is transferred between the CPU and GPU. The result is 10X performance advantage over CPU-only simulation with the same signoff accuracy.

Q. How can designers use PrimeSim Continuum?

Hany Elhak:  IC Designers use PrimeSim Continuum to simulate transistor-level representation of embedded memories, analog front-ends, high precision mixed-signal blocks such as data converters, phased-locked loops and power management ICs, as well as foundation IP, high speed IO and memory peripherals. The continuum is also used to simulate the top-level of the chips that include such blocks and at system-level to verify the signal and power integrity of the high-speed interconnections between chips.

Q. What is PrimeWave?

Hany Elhak:  All the simulation engines of the PrimeSim Continuum solution are integrated into PrimeWave, our next generation design environment. PrimeWave is a comprehensive environment for all advanced analysis covering analog, RF, memory design, and signal and power integrity. Designers at the block-level or the system-level can use PrimeWave either interactively as part of Custom Compiler or in batch mode to augment their verification and regression scripts. PrimeWave is a flexible and programmable environment that improves productivity and ease-of-use.

Q. What makes PrimeSim Continuum the optimal solution?

Hany Elhak: Circuit simulators excel in one verification discipline: SPICE simulators verify high precision analog blocks with high accuracy, FastSPICE simulators extend the SPICE application to larger blocks such as embedded memory and top-level mixed-signal subsystems while RF simulators focus on RF transmitter and receiver designs. Today’s SoC and systems in package include analog, mixed-signal, RF and memory blocks. Using different circuit simulators from different vendors complicate design flows and introduce errors.  PrimeSim Continuum is unique because it brings together the best-in-class SPICE, FastSPICE and RF engines in a unified workflow eliminating the need for individual circuit simulators.

In the past, using GPU technology for circuit simulation has been theorized, but Synopsys has turned that into a reality. With multi-year heavy R&D investment PrimeSim represents the industry’s only proven GPU-accelerated sign-off SPICE providing our customers up to 10X speed improvement, shortening signoff time from days to hours.