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Overview
Neuchips Inc., a semiconductor company based in Taiwan, specializes in developing AI accelerators for data center recommendation models. With a team of about 30 engineers, Neuchips took on the ambitious task of creating an AI accelerator chip within a tight timeframe. Their innovative approach and collaboration with industry leaders have led to the successful development of the Neuchips RecAccel™-N3000, a high-performance AI chip tailored for deep learning recommendation models (DLRM).
Challenges
Neuchips faced several critical challenges in their journey to develop the RecAccel™-N3000 AI accelerator chip:
- Hardware Acceleration: The need to provide increased recommender model capacity that scales in an Open Compute Project (OCP) form factor.
- Energy Efficiency: Achieving high inferences per Joule of energy for accurate predictions.
- Technical Complexity: Developing a chip that would typically require more than 100 engineers over the course of 3 to 4 years, but instead doing it with a smaller team in just 18 months.
Solution
Synopsys IP Solution provided a comprehensive solution for Neuchips:
- ARC AI Reference Design Platform: Enabled early hardware/software co-development.
- ZeBu® Server 4 Emulation System: Accelerated full ASIC RTL simulations from two weeks down to about 20 minutes.
- Array of Synopsys IP Blocks: Included Synopsys ARC HS48 Processor, Synopsys ARC EV72 Processor, Interface IP for AMBA, LPDDR5, PCIe, Memory Compilers, and Hardware Secure Modules.
- Design and Verification Tools: Utilized Synopsys Design Compiler RTL synthesis, VCS® functional verification, SpyGlass® static and formal verification, Verdi® automated debug system, Formality® equivalence checking, PrimeTime® static timing analysis, PrimePower RTL to signoff power analysis, and IC Compiler™ II place-and-route solution.
Results
The implementation of Synopsys IP and tools brought significant benefits to Neuchips:
- Rapid Development: Taped out the 400mm² AI chip in just 18 months, a process that typically requires more than 100 engineers over 3 to 4 years.
- Energy Efficiency: Achieved one million DLRM inferences per Joule of energy.
- Reduced Integration Risks: Silicon-proven IP helped minimize integration risks and contributed to a shorter design cycle.
- Enhanced Productivity: Accelerated simulation and verification processes, significantly reducing development time.
By leveraging Synopsys' comprehensive IP solutions and robust design and verification tools, Neuchips was able to rapidly develop and tape out their AI accelerator chip, achieving impressive energy efficiency and performance. This collaboration has positioned Neuchips to deliver impactful AI solutions in the data center recommendation model space, meeting the growing demands of various industries for personalized customer experiences online.
