Hybrid III-V Silicon Laser (Silicon Evanescent Laser - SEL)

A wide variety of photonic devices compatible with silicon processing have been developed. These include both passive and active devices such as waveguides, modulators, and detectors. The missing component is a light source. This is due to the fact that silicon is an indirect gap material. To resolve this limitation, much effort has been spent on integrating direct gap materials onto silicon substrates. The process of wafer bonding has provided this capability.

Structurally, active III-V layers are bonded on top of waveguiding layers in a silicon on insulator system (SOI). These active layers must be close enough to the silicon waveguide so that a sufficient overlap exists between them and the waveguide mode to achieve lasing. A schematic of such a layer structure is shown in Figure 1. In the example presented here, a ridge waveguide is etched into the silicon layer (0.69µm thick) on top of the buried oxide (BOX). The ridge width is 2.5µm and the etch depth is 0.52µm. The III-V region contains 8 AlGaInAs Quantum Well / Barrier layers as well as cladding and electron blocking layers. The composition of the active layers was designed for 1310nm operation. Such structures have also been realized for 1550 nm ^[1]. Implantation was used to restrict current in the active layers. The width used for this current confinement was 5mm and the length of the active region was 860µm.