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Synopsys HAPS-200 is the industry’s highest performance and most scalable pre-silicon prototyping system. Because of its high performance, HAPS® is used in pre-silicon software development, as well as at-speed interface validation in the system environment. The HAPS-200 6 FPGA platform has 2X performance, 3X higher capacity, faster compile times, and 4X debug capacity and bandwidth over the previous generation. HAPS-200 maintains compatibility with the HAPS ecosystem, enabling mixed systems with HAPS-100. It uses the latest AMD Versal™ Premium VP1902 Adaptive SoC. HAPS prototyping solutions, including HAPS ProtoCompiler prototyping software, are optimized to deliver the best performance. HAPS ProtoCompiler prototyping software builds on 20+ years of FPGA synthesis expertise built with the Synopsys Synplify® FPGA synthesis product line.
What's New
News Release
February 13, 2025
Announcing the Industry's Highest Performance Hardware-Assisted Verification Portfolio
Webinar
Verifying AI Designs - Solving the Challenge of Quadrillions of Verification Cycles
Video
Unveiling Next-Gen Zebu & HAPS: Hardware-Assisted Verification Solutions for Emulation & Prototyping
Configurability for all Emulation and Prototyping Use Cases
HAPS-200 is built on an EP-Ready Hardware Platform that allows to reconfiguration to support ZeBu-200 synchronous clocking with ZeBu Software. Read more in our blog.
HAPS is ideal for IP RTL regressions for single-clock IPs. It allows fast execution of hardware and software. It is suitable for CPUs, GPUs, NPUs, and AI-accelerators.
HAPS can help validate low-level software drivers before software/hardware validation. Several debug capabilities allow developers to monitor and debug the execution software during the SoC system bring-up.
HAPS prototyping systems are used when synthesizable RTL source code of the ASIC/system-on-chip design is available, allowing designers to develop software, verify SoC hardware, and enable system validation before the silicon is taped out.
HAPS prototyping systems are capable of at-speed interface prototyping, due to the asynchronous capabilities of the HAPS ProtoCompiler. The HAPS IP Prototyping Kit offers at-speed prototyping of Synopsys IP, allowing customers to run interoperability testing as well as compliance and certification.
Features & Benefits
- Performance: Up to 2x vs HAPS-100
- Higher performance TDM; Higher host interface bandwidth, higher debug bandwidth
- Ease of re-cabling / reduced barrier to re-cabling for performance optimization
- Capacity scaling from single FPGA to multi-rack setup
- Ease of HW cabling setup and in-field replaceability of connectors
- Better Debug capacity and bandwidth; 4x vs HAPS-100
- Faster compile time maintains turnaround time for larger design Sizes
- Compatibility with HAPS ecosystem
- Enable mixed systems: HAPS-200 + HAPS-100
- Maintain HT3 connectors for compatibility with existing accessories
- Form factor: fit better in rack environments, vertical PCB placement and connectors on the side to optimize space
- and connectivity within racks
- Configurable for emulation utilizing Synopsys EP-Ready Hardware
What Our Customers Are Saying
"With the increasing market requirements for handling large AI computational data sets driving the need for enormous GPU and CPU computational power, the development time for NVIDIA’s next generation AI systems have become highly compressed to a yearly release cycle, necessitating best-in-class prototyping solutions. Synopsys HAPS-200 offers the fastest prototyping speed in the industry. The 50 MHz performance we have been able to achieve with HAPS-200 has been key to boosting productivity of our software development teams. We are looking forward to scaling our HAPS-200 deployment to take full advantage for our software development teams.”
Narendra Konda | Vice President, Hardware Engineering, NVIDIA
